HI2559 Datasheet, PDF (2/11 Pages) Intersil Corporation – 1-Bit D/A Converter For Audio Application

Block Diagram
XTLI
HI2559, CXD2559
XTLO
XCLK
LRCK
BCK
SIN
MASL
MLSL
ATT
SHIFT
LATCH
SP
HOST
COMPUTER
I/F
CLOCK GENERATOR
TIMING CIRCUIT
DIGITAL
FILTER
(OVER SAMPLING)
DAC1
DAC2
AOUT1 (+)
AOUT1 (-)
AOUT2 (+)
AOUT2 (-)
ROM
ATT1
ATT2
RAM
Pin Descriptions
PIN NO.
1
2
3
4
5
6
7
SYMBOL
AV_DD0
AOUT2(–)
ADV_SS0
DV_DD0
TEST
CLR
MASL
8
DV_SS0
9
LRCK
10
BCK
11
SIN
12
MLSL
I/O
DESCRIPTION
-
Analog power supply for Channel 2 output.
O
Analog reversed phase output for Channel 2.
-
Analog GND for Channel 2 output.
-
Digital power supply.
I
IC measurement. Fixed to Low.
I
System clear input. Cleared when low. Equipped with a pull-up resistor.
I
Selects whether 16-bit serial data is placed in the first 16-bit or the second 16-bit slot of the
serial IN 32-bit slots. Frontward truncation when High; rearward truncation when low.
Equipped with a pulldown resistor.
-
Digital GND.
I
Serial IN sampling frequency clock. Transfers Channel-1 data when High; Channel-2 data
when low.
I
Serial bit transfer clock 48 F_S or 64 F_S in serial IN. The serial input data is retrieved at the
rising edge.
I
Two channels per sampling serial data input. Data format is represented by 2’s comple-
ments, and consists of 24-bit or 32-bit slots.
I
Selects whether 16-bit serial data SIN (Pin 15) of serial IN at LSB first or MSB first. MSB-
first when High; LSB-first when Low. Equipped with a pull-up resistor.
4-2