HFA1212_04 Datasheet, PDF (2/12 Pages) Intersil Corporation – Dual 350MHz, Low Power Closed Loop Buffer Amplifier

HFA1212
Absolute Maximum Rating
Thermal Information
Supply Voltage (V+ to V-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_SUPPLY
Output Current (Note 1) . . . . . . . . . . . . . . . . . Short Circuit Protected
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . .600V
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40^oC to 85^oC
Thermal Resistance (Typical, Note 2)
θ_JA (^oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
160
Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . .175^oC
Maximum Junction Temperature (Plastic Package) . . . . . . . .150^oC
Maximum Storage Temperature Range . . . . . . . . . -65^oC to 150^oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300^oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Output is protected for short circuits to ground. Brief short circuits to ground will not degrade reliability, however, continuous (100% duty cycle)
output current should not exceed 30mA for maximum reliability.
2. θ_JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
V_SUPPLY = ±5V, A_V = +1, R_L = 100Ω, Unless Otherwise Specified.
TEST
CONDITIONS
(NOTE 3)
TEST TEMP
LEVEL (^oC)
MIN
TYP MAX
UNITS
INPUT CHARACTERISTICS
Output Offset Voltage
A
25
-
2
10
mV
Average Output Offset Voltage Drift
A
Full
-
B
Full
-
3
15
22
70
mV
µV/^oC
Channel-to-Channel Output Offset
Voltage Mismatch
A
25
-
-
15
mV
A
Full
-
-
30
mV
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Input Bias Current
∆V_CM = ±1.8V
∆V_CM = ±1.8V
∆V_CM = ±1.2V
∆V_PS = ±1.8V
∆V_PS = ±1.8V
∆V_PS = ±1.2V
A
25
42
45
-
dB
A
85
40
44
-
dB
A
-40
40
45
-
dB
A
25
45
49
-
dB
A
85
43
48
-
dB
A
-40
43
48
-
dB
A
25
-
1
15
µA
Input Bias Current Drift
A
Full
-
B
Full
-
3
25
30
80
µA
nA/^oC
Channel-to-Channel Input Bias Current
Mismatch
A
25
-
-
15
µA
A
Full
-
-
25
µA
Input Bias Current Power Supply Sensitivity ∆V_PS = ±1.25V
A
25
-
0.5
1
A
Full
-
-
3
µA/V
µA/V
Input Resistance
Inverting Input Resistance
∆V_CM = ±1.8V
∆V_CM = ±1.8V
∆V_CM = ±1.2V
A
25
0.8
1.1
-
MΩ
A
85
0.5
1.4
-
MΩ
A
-40
0.5
1.3
-
MΩ
C
25
-
350
-
Ω
Input Capacitance
C
25
-
2
-
pF
Input Voltage Common Mode Range
(Implied by V_IO CMRR and +R_IN tests)
A
25, 85 ±1.8
±2.4
-
V
A
-40
±1.2
±1.7
-
V
Input Noise Voltage Density (Note 4)
f = 100kHz
B
25
-
7
-
nV/√Hz
Input Noise Current Density (Note 4)
f = 100kHz
B
25
-
3.6
-
pA/√Hz
2