HA-4900_05 Datasheet, PDF (2/8 Pages) Intersil Corporation – Precision Quad Comparators

HA-4900, HA-4902, HA-4905
Absolute Maximum Ratings
Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . . . . 33V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V
Voltage Between V_LOGIC+ and V_LOGIC-. . . . . . . . . . . . . . . . . . .18V
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Power Dissipation (Notes 1, 2)
Operating Conditions
Temperature Range
HA-4900-2, HA-4902-2. . . . . . . . . . . . . . . . . . . . . -55^oC to 125^oC
HA-4905-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0^oC to 75^oC
Thermal Information
Thermal Resistance (Typical, Note 3)
θ_JA (^oC/W) θ_JC (^oC/W)
CERDIP Package. . . . . . . . . . . . . . . . .
85
25
PDIP Package . . . . . . . . . . . . . . . . . . .
90
N/A
SOIC Package . . . . . . . . . . . . . . . . . . . 100
N/A
Maximum Junction Temperature (Ceramic Package) . . . . . . .175^oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . .150^oC
Maximum Storage Temperature Range . . . . . . . . . . -65^oC to 150^oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300^oC
(SOIC - Lead Tips Only)
Die Characteristics
Back Side Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V-
Number of Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Die Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 mils x 105 mils
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation, including output load, must be designed to maintain the junction temperature below 175^oC for ceramic packages,
and below 150^oC for plastic packages.
2. Total Power Dissipation (T.P.D.) is the sum of individual dissipation contributions of V+, V- and V_LOGIC shown in curves of Power Dissipation
vs Supply Voltages (see Performance Curves). The calculated T.P.D. is then located on the graph of Maximum Allowable Package Dissipation
vs Ambient Temperature to determine ambient temperature operating limits imposed by the calculated T.P.D. (See Performance Curves). For
instance, the combination of +15V, -15V, +5V, 0V (V+, V-, V_LOGIC+, V_LOGIC-) gives a T.P.D. of 350mW, the combination +15V, -15V, +15V,
0V gives a T.P.D. of 450mW.
3. θ_JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
V_SUPPLY = ±15V, V_LOGIC+ = 5V, V_LOGIC- = GND
TEMP
(^oC)
HA-4900-2
-55^oC to 125^oC
MIN TYP MAX
HA-4902-2
-55^oC to 125^oC
MIN TYP MAX
HA-4905-5
0^oC to 75^oC
MIN TYP MAX
UNITS
INPUT CHARACTERISTICS
Offset Voltage (Note 4)
25
-
2
3
-
2
5
-
4
7.5
mV
Full
-
-
4
-
-
8
-
-
10
mV
Offset Current
25
-
10
25
-
10
35
-
25
50
nA
Full
-
-
35
-
-
45
-
-
70
nA
Bias Current (Note 5)
25
-
50
75
-
50
150
-
100
150
nA
Full
-
-
150
-
-
200
-
-
300
nA
Input Sensitivity (Note 6)
25
-
-
V_IO +
-
-
V_IO +
-
-
V_IO +
mV
0.3
0.5
0.5
Full
-
-
V_IO +
-
-
V_IO +
-
-
V_IO +
mV
0.4
0.6
0.7
Common Mode Range
Full
V-
-
(V+) - V-
-
(V+) -
V-
-
(V+) -
V
2.4
2.6
2.4
Differential Input Resistance
25
-
250
-
-
250
-
-
250
-
MΩ
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
25
-
400
-
-
400
-
-
400
-
kV/V
Response Time (t_PD(0))
(Note 7)
25
-
130
200
-
130
200
-
130
200
ns
Response Time (t_PD(1))
(Note 7)
25
-
180
215
-
180
215
-
180
215
ns
2