CA3227_02 Datasheet, PDF (2/6 Pages) Intersil Corporation – High-Frequency NPN Transistor Array For Low-Power Applications at Frequencies Up to 1.5GHz

CA3227
Absolute Maximum Ratings
Collector to Emitter Voltage (V_CEO). . . . . . . . . . . . . . . . . . . . . . . 8V
Collector to Base Voltage (V_CBO) . . . . . . . . . . . . . . . . . . . . . . . 12V
Collector to Substrate Voltage (V_CIO, Note 1) . . . . . . . . . . . . . . 20V
Collector Current (I_C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55^oC to 125^oC
Thermal Information
Thermal Resistance (Typical, Note 2)
θ_JA (^oC/W)
16 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
185
Maximum Power Dissipation (Any One Transistor) . . . . . . . . 85mW
Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . 175^oC
Maximum Junction Temperature (Plastic Package). . . . . . . . 150^oC
Maximum Storage Temperature Range . . . . . . . . . . -65^oC to 150^oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300^oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of these devices is isolated from the substrate by an integral diode. The substrate (Terminal 5) must be connected
to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor action.
2. θ_JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications T_A = 25^oC
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNITS
DC CHARACTERISTICS FOR EACH TRANSISTOR
Collector to Base Breakdown Voltage
V_(BR)CBO I_C = 10µA, I_E = 0
12
20
-
V
Collector to Emitter Breakdown Voltage V_(BR)CEO I_C = 1mA, I_B = 0
8
10
-
V
Collector to Substrate Breakdown Voltage V_(BR)CIO I_C1 = 10µA, I_B = 0, I_E = 0
20
-
-
V
Emitter Cutoff Current (Note 3)
I_EBO
V_EB = 4.5V, I_C = 0
-
-
10
µA
Collector Cutoff Current
I_CEO
V_CE = 5V, I_B = 0
-
-
1
µA
Collector Cutoff Current
I_CBO
V_CB = 8V, I_E = 0
-
-
100
nA
DC Forward Current Transfer Ratio
h_FE
V_CE = 6V
I_C = 10mA
-
110
-
I_C = 1mA
40
150
-
I_C = 0.1mA
-
150
-
Base to Emitter Voltage
V_BE
V_CE = 6V
I_C = 1mA
0.62
0.71
0.82
V
Collector to Emitter Saturation Voltage
V_{CE SAT}
I_C = 10mA, I_B = 1mA
-
0.13
0.50
V
Base to Emitter Saturation Voltage
V_{BE SAT}
I_C = 10mA, I_B = 1mA
0.74
-
0.94
V
NOTE:
3. On small-geometry, high-frequency transistors, it is very good practice never to take the Emitter Base Junction into reverse breakdown. To do
so may permanently degrade the h_FE. Hence, the use of I_EBO rather than V_(BR)EBO. These devices are also susceptible to damage by
electrostatic discharge and transients in the circuits in which they are used. Moreover, CMOS handling procedures should be employed.
2