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X4323_06 Datasheet, PDF (19/22 Pages) Intersil Corporation – CPU Supervisor with 32k EEPROM
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X4323, X4325
Power-Up and Power-Down Timing
VCC
VTRIP
0 Volts
tPURST
tPURST
tF
tR
tRPD
RESET
(X4323)
RESET
(X4325)
RESET Output Timing
Symbol
VTRIP
tPURST
tRPD(8)
tF(8)
tR(8)
VRVALID
Parameter
Reset Trip Point Voltage, X4323-4.5A, X4325-4.5A
Reset Trip Point Voltage, X4323, X4325
Reset Trip Point Voltage, X4323-2.7A, X4325-2.7A
Reset Trip Point Voltage, X4323-2.7, X4325-2.7
Power-up Reset Time OUT
VCC Detect to Reset/Output
VCC Fall Time
VCC Rise Time
Reset Valid VCC
Notes: (8) This parameter is periodically sampled and not 100% tested.
SDA vs. RESET Timing
tRSP
tRSP<tWDO
tRSP>tWDO
SCL
SDA
VRVALID
VRVALID
Min.
4.5
4.25
2.85
2.55
100
100
100
1
Typ.
4.62
4.38
2.92
2.62
250
Max.
4.75
4.5
3.0
2.7
400
500
Unit
V
ms
ns
µs
µs
V
tRST
tRSP>tWDO
tRST
RESET
Note: All inputs are ignored during the active reset period (tRST).
19
FN8122.1
May 25, 2006
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