English
Language : 

X40020 Datasheet, PDF (19/24 Pages) Intersil Corporation – Dual Voltage Monitor with Intergrated CPU Supervisor and System Battery Switch
◁
RESET/RESET/MR Timings
X40020, 40021
VTRIP1
VCC
tPURST
RESET
tR
VRVALID
tRPD1
tPURST
tF
RESET
MR
tMD
LOW VOLTAGE AND WATCHDOG TIMINGS PARAMETERS (@25°C, VCC = 5V)
Symbol
tRPD1(1)
tRPDL
tLR (1)
tRPD2(1)
tPURST
Parameters
VTRIP1 to RESET/RESET (Power-down only)
VTRIP1 to LOWLINE
LOWLINE to RESET/RESET delay (Power-down only) [= tRPD1-tRPDL]
VTRIP2 to V2FAIL
Power-on Reset delay:
PUP1 = 0, PUP0 = 0
PUP1 = 0, PUP0 = 1 (Factory default)
PUP1 = 1, PUP0 = 0
PUP1 = 1, PUP0 = 1
tF
tR
VRVALID
tMD(1)
tin1
tWDO
VCC, V2MON Fall Time
VCC, V2MON Rise Time
Reset Valid VCC
MR to RESET/ RESET delay (activation only)
Pulse width Suppression Time for MR
Watchdog Timer Period:
WD1 = 0, WD0 = 0
WD1 = 0, WD0 = 1
WD1 = 1, WD0 = 0
WD1 = 1, WD0 = 1 (factory default)
tRST1
Watchdog Reset Time Out Delay
WD1 = 0, WD0 = 0
WD1 = 0, WD0 = 1
tRST2
tRSP
Watchdog Reset Time Out Delay WD1=1, WD0=0
Watchdog timer restart pulse width
Note: (1) Based on characterization data.
Min.
20
20
1
500
50
100
12.5
1
Typ.
500
50(1)
200
400(1)
800(1)
1.4(1)
200(1)
25
OFF
200
25
Max.
5
5
300
37.5
Unit
µs
ns
µs
ms
ms
ms
ms
mV/µs
mV/µs
V
ns
ns
s
ms
ms
ms
ms
µs
19
FN8112.0
March 28, 2005
 ▷