ISL97673_10 Datasheet, PDF (18/27 Pages) Intersil Corporation – 6-Channel SMBus or PWM Dimming LED Driver with Phase Shift Control

1
7
S
Slave Address
Master to Slave
Slave to Master
ISL97673
1
1
8
1
W
A
Command Code
A
8
Data byte
FIGURE 26. WRITE BYTE PROTOCOL
1
1
A
P
1
7
1
1
S Slave Address W
A
Master to Slave
Slave to Master
8
Command
Code
1
1
8
1
1
A
S Slave Address R
A
FIGURE 27. READ BYTE PROTOCOL
8
Data Byte
1
1
A
P
Write Byte
The Write Byte protocol is only three bytes long. The first
byte starts with the slave address followed by the
“command code,” which translates to the “register index”
being written. The third byte contains the data byte that
must be written into the register selected by the
“command code”. A shaded label is used on cycles during
which the slaved backlight controller “owns” or “drives”
the Data line. All other cycles are driven by the “host
master.”
Read Byte
As shown in the Figure 27, the four byte long Read Byte
protocol starts out with the slave address followed by
the “command code” which translates to the “register
index.” Subsequently, the bus direction turns around
with the re-broadcast of the slave address with bit 0
indicating a read (“R”) cycle. The fourth byte contains
the data being returned by the backlight controller. That
byte value in the data byte reflects the value of the
register being queried at the “command code” index.
Note the bus directions, which are highlighted by the
shaded label that is used on cycles during which the
slaved backlight controller “owns” or “drives” the Data
line. All other cycles are driven by the “host master.”
Slave Device Address
The slave address contains 7 MSB plus one LSB as R/W
bit, but these 8 bits are usually called Slave Address
bytes. As shown in Figure 28, the high nibble of the Slave
Address byte is 0x5 or 0101b to denote the “backlight
controller class.” Bit 3 in the lower nibble of the Slave
Address byte is 1. Bit 0 is always the R/W bit, as
specified by the SMBus/I²C protocol. Note: In this
document, the device address will always be expressed
as a full 8-bit address instead of the shorter 7-bit address
typically used in other backlight controller specifications
to avoid confusion. Therefore, if the device is in the write
mode where bit 0 is 0, the slave address byte is 0x58 or
01011000b. If the device is in the read mode where bit 0
is 1, the slave address byte is 0x59 or 01011001b.
The backlight controller may sense the state of the pins
at POR or during normal operation. The pins will not
change state while the device is in operation.
MSB
LSB
0
1
0
1
1
0
0 R/W
DEVICE
IDENTIFIER
DEVICE
ADDRESS
FIGURE 28. SLAVE ADDRESS BYTE DEFINITION
SMBus/I²C Register Definitions
The backlight controller registers are Byte wide and
accessible via the SMBus/I²C Read/Write Byte
protocols. Their bit assignments are provided in the
following sections with reserved bits containing a
default value of “0”.
18
FN7633.0
June 24, 2010