ISL59531 Datasheet, PDF (17/21 Pages) Intersil Corporation – 16x16 Video Crosspoint with Differential Inputs

Serial Timing Diagram
ENA
SCLK
t_SD
t_HD
ISL59531
t_E
T
t_r
t_f
t_HE
t_SE
t_w
SDI
B0
B1
B2
B12-B2
B14
B15
LSB
LOAD MSB FIRST, LSB LAST
t
MSB
PARAMETER
T
t_HE
t_SE
t_HD
t_SD
t_W
TABLE 1. SERIAL TIMING PARAMETERS
RECOMMENDED OPERATING RANGE
DESCRIPTION
≥200ns
Clock Period
≥20ns
ENA Hold Time
≥20ns
ENA Setup Time
≥20ns
Data Hold Time
≥20ns
Data Setup Time
0.50 * T
Clock Pulse Width
Programming Model
The device has power-on reset that disables outputs, disables test mode, and turns off analog currents. To start up the device the
control word is sent:
TABLE 2. CONTROL WORD FORMAT
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3
B2
B1
B0
1
1
1
-
-
-
-
0 --0 0
0
0
0
0
Power on
Common
output enable
It is important to always program control bits 2-8 as zeros to avoid activating test modes designed for device manufacturing.The
clamp bit activates the input clamp and bleed current sink and works only in the single-ended version.
To enable individual outputs, the output enable control word is sent. There are 16 enables to set; this is done with serial words
controlling four at a time. The output enable control word format is:
TABLE 3. OUTPUT ENABLE FORMAT
B15 B14 B13 B12 B11 B10 B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
0
0
1
-
-
-
N1
N0
-
O_n+3
-
O_n+2
-
O_n+1
-
O_n
The O_x bits represent output enables of eight individual registers. The N1 and N0 bits represent a two bit binary number which is
used in setting n = 2^N1N0. For instance, to access the control bit of the 5th output enable, we send the word:
TABLE 4. OUTPUT ENABLE WORD OF 2ND GROUP OF OUTPUTS
B15 B14 B13 B12 B11 B10 B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
0
0
1
-
-
-
0
1
-
O₇
-
O₆
-
1
-
O₄
Individual output enables are ended with the control register’s common output enable bit and the power on bit.
17
FN6251.0
March 21, 2006