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ISL1591 Datasheet, PDF (17/18 Pages) Intersil Corporation – Fixed Gain, Dual Port, VDSL2 Line Driver
ISL1591
The minimum VP-P would be twice as much, or 38.2VP-P. While
this extreme condition would normally not be encountered, it
does show the importance of knowing your minimum expected
load for high output swing conditions.
Board Design Recommendations
Close placement of the supply decoupling capacitors will
minimize parasitic inductance in the supply path. High frequency
load currents are typically pulled through these capacitors so
close placement of 0.01µF capacitors on each of the supply pins
will improve dynamic performance. Higher valued capacitors,
6.8µF typically, can be placed further from the package as they
are providing more of the low frequency decoupling.
The thermal pad for the ISL1591 should be connected to either
ground or the -VS power plane. The choice of which plane
depends on which one would have the more accessible thermal
area.
While the ISL1591 is relatively robust in driving parasitic
capacitive loads, it is always preferred to get any series output
resistor needed in the design as physically close as possible to
the output pins. Then trace capacitance on the other side of that
resistor will have a much smaller effect on loop phase margin.
Protection devices that are intended to steer large load
transients away from the ISL1591 output stage and into the
power supplies or ground should have a short trace from their
supply connections into the nearest supply capacitor - or should
include their own supply capacitors to provide a low impedance
path under fast transient conditions.
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest revision.
DATE
REVISION
CHANGE
10/30/2012
FN7625.1 page 2 , Figure 3 schematic: added resistor values and added buffer between Rc and Rt.
08/18/2011
FN7625.0 Initial Release
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17
FN7625.1
October 31, 2012