ISL8103 Datasheet, PDF (16/27 Pages) Intersil Corporation – Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers

ISL8103
OUTPUT PRECHARGED
ABOVE DAC LEVEL
OUTPUT PRECHARGED
BELOW DAC LEVEL
GND>
V_OUT (0.5V/DIV)
GND>
ENLL (5V/DIV)
T1 T2
T3
FIGURE 12. SOFT-START WAVEFORMS FOR ISL8103-BASED
MULTI-PHASE CONVERTER
Fault Monitoring and Protection
The ISL8103 actively monitors output voltage and current to
detect fault conditions. Fault monitors trigger protective
measures to prevent damage to the load.
* Connect DROOP to IREF
to disable the Droop feature.
R_OCSET
IREF
ISUM
DROOP* _{ICOMP - VOCSET +}
+
ISEN
-
-
V_DROOP
+
OCSET
100µA
VDIFF
+
OC
+1V
-
DAC + 150mV
V_OVP
VSEN
RGND
+
x1
-
SOFT-START, FAULT
AND CONTROL LOGIC
-
OV
+
-
UV
+
PGOOD
0.82 x DAC _{ISL8103 INTERNAL CIRCUITRY}
FIGURE 13. POWER GOOD AND PROTECTION CIRCUITRY
One common power good indicator is provided for linking to
external system monitors. The schematic in Figure 13
outlines the interaction between the fault monitors and the
power good signal
Power Good Signal
The power good pin (PGOOD) is an open-drain logic output
that transitions high when the converter is operating after
soft-start. PGOOD pulls low during shutdown and releases
high after a successful soft-start. PGOOD transitions low
when an undervoltage, overvoltage, or overcurrent condition
is detected or when the controller is disabled by a reset from
ENLL or POR. If after an undervoltage or overvoltage event
occurs the output returns to within under and overvoltage
limits, PGOOD will return high.
Undervoltage Detection
The undervoltage threshold is set at 82% of the REF
voltage. When the output voltage (VSEN-RGND) is below
the undervoltage threshold, PGOOD gets pulled low. No
other action is taken by the controller. PGOOD will return
high if the output voltage rises above 85% of the REF
voltage.
Overvoltage Protection
The ISL8103 constantly monitors the difference between the
VSEN and RGND voltages to detect if an overvoltage event
occurs. During soft-start, while the DAC/REF is ramping up,
the overvoltage trip level is the higher of REF plus 150mV or
a fixed voltage, V_OVP. The fixed voltage, V_OVP, is 1.67V.
Upon successful soft-start, the overvoltage trip level is only
REF plus 150mV. OVP releases 50mV below its trip point if it
was “REF plus 150mV” that tripped it, and releases 100mV
below its trip point if it was the fixed voltage, V_OVP, that
tripped it. Actions are taken by the ISL8103 to protect the
load when an overvoltage condition occurs, until the output
voltage falls back within set limits.
At the inception of an overvoltage event, all LGATE signals
are commanded high, and the PGOOD signal is driven low.
This causes the controller to turn on the lower MOSFETs
and pull the output voltage below a level that might cause
damage to the load. The LGATE outputs remain high until
VDIFF falls to within the overvoltage limits explained above.
The ISL8103 will continue to protect the load in this fashion
as long as the overvoltage condition recurs.
Once an overvoltage condition ends the ISL8103 continues
normal operation and PGOOD returns high.
Pre-POR Overvoltage Protection
Prior to PVCC and VCC exceeding their POR levels, the
ISL8103 is designed to protect the load from any overvoltage
events that may occur. This is accomplished by means of an
internal 10kΩ resistor tied from PHASE to LGATE, which
turns on the lower MOSFET to control the output voltage
until the overvoltage event ceases or the input power supply
cuts off. For complete protection, the low side MOSFET
16
FN9246.0
February 15, 2006