ISL6113 Datasheet, PDF (16/24 Pages) Intersil Corporation – Dual Slot PCI-E Hot Plug Controllers

ISL6113, ISL6114
PCI-Express Application
Recommendations
For each of the 3VMAIN and +12VMAIN supply, the CR level is
set by an external sense resistor value depending on the
maximum specified power for the various sizes of the
PCI-Express connector and application implemented (X1, 10W
or 25W; X4, X8, 25W; X16, 25W or 75W; and X16
Graphic-ATX, 150W). The power rating is a combination of both
main and the optional auxiliary supplies. This sense resistor is a
low sub-1Ω standard value current sense resistor (one for each
slot) and the voltage across this resistor is compared to a 50mV
reference. On the 12VMAIN, for a10W connector, a 75mΩ
sense resistor provides a nominal CR level of 0.66A, 32%
above the 0.5A maximum specification; for a 25W connector, a
20mΩ sense resistor provides a nominal CR level of 2.5A, 19%
above the 2.1A maximum specification; for a 75W connector a
8mΩ sense resistor provides a nominal CR level of 6.25A, 14%
above the 5.5A maximum specification; for a X16 Graphics-
ATX 150W card, a 7mΩ sense resistor provides a nominal CR
level of 7.1A, 14% above the 6.25A maximum specification.
The 150W is provided by 2 slots, each providing up to a
maximum of 75W from the 12VMAIN as this specialized type of
card does not consume 3VMAIN or AUX supply power. The
3.3V supply uses a 15mΩ sense resistor compared to a 50mV
reference to provide a nominal CR of 3.3A or 11% above the 3A
maximum specification load across all sizes and power levels
of the connector.
Table 4 provides recommended 12VMAIN sense resistor
values for particular power levels.
TABLE 4.
NOMINAL CURRENT REGULATION LEVEL
12VMAIN R_SENSE 12VMAIN PCI-E ADD IN BOARD POWER
(mΩ)
CR (A)
LEVEL SUPPORTED (W)
75
0.7
10
20
2.5
25
8
6.2
75
7
7
150
NOTE: CR Level = VTH_ILIMIT/R_SENSE.
Providing a nominal CR protection level above the maximum
specified limits of the card ensures that the card is able to
draw its maximum specified loads, and, in addition, have
enough headroom before a regulated current limiter is
invoked to protect against transients and other events. This
headroom margin can be adjusted up or down by utilizing
differing values of sense resistor.
Using the ISL6113EVAL1Z,
ISL6114EVAL1Z Platform
Description and Introduction
The primary ISL6113, ISL6114 evaluation platform is shown in
Figures 37 and 38 both photographically and schematically.
This evaluation board highlights a PCB layout that confines all
necessary active and passive components in an area
12mmx55mm. This width is smaller than the specified
PCI-Express socket to socket spacing allowing for intimate
co-location of the load power control and the load itself.
Around the central highlighted layout are numerous labeled
test points and configuration jumpers. Where there are node
names such as, AO(L/R) the pin name in parentheses
relates to the ISL6113, ISL6114. The ISL6113, ISL6114
share an evaluation platform with the ISL6112 as all three
parts have a common pinout for the common pin functions.
The specific evaluation board as ordered and received will
reflect the part number in the area below the Intersil logo
either by label or silk screened lettering. For those pins not
common across the ISL6112 and ISL6113, ISL6114 in the
bottom left corner there is a matrix detailing the differences.
After correctly biasing the evaluation platform as noted
through the 6 banana jacks, turning on VSTBY first then the
other MAIN supplies in any order. With the appropriate
signaling to the AUXEN and ON inputs the user should see
turn-on waveforms as shown previously. The addition of
external current loading is necessary to demonstrate the OC
and WOC response performance.
Figures 18 and 19 demonstrate some of the PCI-E specific
and additional I/O functionality. Figure 18 shows the PRSNT
pin being signaled low then the 12V_OUT and 3V_OUT outputs
turning on automatically as the ON input is already asserted.
Power good is signaled once the 12V_OUT and 3V_OUT meet
their respective VUVVth levels. After the time period t_PVPERL
the PCI-E specific reset signal output, PERST is asserted.
Figure 19 shows the GPI to GPO ~6ms functionality.
Figure 20 shows the retry period operation. Approximately
every 1.5s the IC attempts to restart into a faulty load until
finally being able to turn-on fully into a normal load. This retry
mode is invoked with R/L input tied low.
ISL6113EVAL1Z, ISL6114EVAL1Z Errata
GPO_A0 and GPO_BO labeling is reversed. Correct
labeling shown on evaluation board photograph in Figure 37.
Caution: The ISL6113EVAL1Z, ISL6114EVAL1Z gets very
hot to the touch after operating it for a few minutes. Hottest
areas marked on evaluation board.
16
FN6457.0
September 25, 2007