ISL28617VY25EV1Z Datasheet, PDF (16/19 Pages) Intersil Corporation – 40V Precision Instrumentation Amplifier with Differential ADC Driver

ISL28617
EXAMPLE 3: GAINS LESS THAN 1
The ISL28617 is configured to a gain of 0.2V/V driving a
rail-to-rail 3V ADC. In this application, the maximum input
dynamic range is ±15V.
- V_CC = +18V, V_EE = -18V
- V_CO = +3V, V_EO = GND
- V_CMO = +1.5V
- V_CC, V_EE power supply common connects to GND
In this attenuator configuration, the input signal range is ±15V,
which requires an additional ±3V of input overhead from the
input supplies. Thus, V_CC and V_EE = ±18V.
AC Performance Considerations
The ISL28617 closed loop frequency response is formed by the
feedback G_M amplifier and gain resistor R_FB and has the
characteristics of a current feedback amplifier. Therefore, the
-3dB gain does not significantly decrease at high gains as is the
case with the constant gain-bandwidth response of the classic
voltage feedback amplifier.
There are four behaviors of current feedback amplifiers that
must be considered:
• Frequency response increases with decreasing values of R_FB.
A comparison of the G = 100, -3db response (Figures 18, 19)
R_FB at 30.1kΩ vs 121kΩ shows almost a 4X decrease from
2MHz to 0.5MHz.
• Gain peaking tends to increase with decreasing values of R_FB.
• Wide band applications at gains less than 1 (Figures 18, 19)
can have high gain peaking resulting in high levels of
overshoot with pulsed input signals.
• Parasitic capacitance at the feedback resistor terminals
(+R_FB, -R_FB) and the Kelvin sense terminals (+R_FBSENSE,
-R_FBSENSE) will result in increasing levels of peaking and
transient response overshoot.
To minimize peaking external PC parasitic capacitance should be
minimized as much as possible. The ISL28617 is designed to be
stable with PC board parasitic capacitance up to 20pF and
feedback resistor values down to 30.1kΩ. At gains less than 1,
the maximum parasitic capacitance may have to be limited
further to avoid additional compensation.
Uncorrected gain peaking and high overshoot in the feedback
stage can cause loss of feedback loop stability if the transient
causes the feedback voltage to exceed the common mode input
range of the feedback amplifier or the maximum linear range of
the feedback resistor R_FB. Corrective actions include increasing
the size of the feedback resistor (see Figure 32) and re-scaling
the input gain resistor R_IN, or adding input frequency
compensation described in the next section.
The penalty of increasing the R_FB (and R_IN re-scaling) is increased
noise, so this is generally not the corrective action of choice
AC Compensation Techniques
The input compensation with a low pass filter (Figure 34) can be
an effective way to block high frequency signals from the
differential amplifier inputs. It does not change the gain peaking
behavior of the feedback loop, but it does block signals from
creating overdrive instability. This method is useful after other
corrective measures have been implemented, and when there is
little control over the input signal frequency content.
DIFFERENTIAL
INPUT SIGNAL
R/2
C
R/2
COMMON
MODE ERROR
TRACE
CAPACITANCE
IN- ^500Ω
IN+ ^500Ω
GND
FIGURE 34. INPUT DIFFERENTIAL LOW PASS FILTER AND
PARASITIC CAPACITANCE
Input Common Mode Rejection
Considerations
The ISL28617 is capable of a very high level (120dB) of CMRR
performance from DC to as high as 1kHz. (Figure 1; CMRR vs
Frequency). This high level of performance over frequency is
made possible by the high common mode input impedance
(80GΩ) but requires careful attention to the matching of the
IN+ and IN- external impedances to GND.
A mismatch in the series impedance in conjunction with parasitic
capacitance at the IN+ and IN- terminals (Figure 34) will cause a
common mode amplitude imbalance that will show up as a
differential input signal, rapidly degrading CMRR as the common
mode frequency increases.
Maximum CMRR performance is achieved with attention to
balancing external components and attention to PC layout.
Layout Guidelines
The ISL28617 is a high precision device with wide band AC
performance. Maximizing DC precision requires attention to the
layout of the gain resistors. Achieving good AC response requires
attention to parasitic capacitance at the gain resistor terminals,
and CMRR performance over frequency is ensured with
symmetrical component placement and layout of the input
differential signals to the IN+ and IN- terminals.
To ensure the highest DC precision, the location of the gain
resistors and PC trace connections to the Kelvin connections are
most important. Proper Kelvin connections remove trace
resistance errors so that the amplifier gain accuracy, and gain
temperature coefficients are determined by the gain resistor
matching tolerance. Interconnect constraints preclude mounting
the gain resistors next to each other, so they should be located on
either side of the ISL28617 and as close to the device as
possible. The Kelvin connections are formed at the junction of
the sense pins (±R_INSENSE, ±R_FBSENSE) and the gain resistor
current drive terminals (±R_IN, ±R_FB) terminals. This junction
should be made at the terminal pads directly under the ends of
each resistor.
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FN6562.1
October 17, 2013