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ISL78022_14 Datasheet, PDF (15/19 Pages) Intersil Corporation – Automotive Grade TFT-LCD DC/DC with Integrated Amplifiers
ISL78020, ISL78022
which LDO regulators generate the VON and VOFF supplies.
It can be appreciated that should a regular supply of LX
switching edges be interrupted, (for example during
discontinuous operation at light boost load currents), then
this may affect the performance of VON and VOFF regulation
(depending on their exact loading conditions at the time).
To optimize VON/VOFF regulation, the boundary of
discontinuous/continuous operation of the boost converter
can be adjusted, by suitable choice of inductor given VIN,
VOUT, switching frequency and the VBOOST current loading,
to be in continuous operation.
The following equation gives the boundary between
discontinuous and continuous boost operation. For
continuous operation (LX switching every clock cycle) we
require that:
I(VBOOST_load) > D • (1 – D ) • VIN ⁄ (2 • L • fOSC)
(EQ. 17)
where the duty cycle, D = (VBOOST – VIN)/VBOOST
For example, with VIN = 5V, fOSC = 1.2MHz and
VBOOST = 12V we find continuous operation of the boost
converter can be guaranteed for:
L = 10µH and I(VBOOST) > 51mA
L = 6.8µH and I(VBOOST) > 74mA
L = 3.3µH and I(VBOOST) > 153mA
Start-up Sequence
Figure 22 shows a detailed start-up sequence waveform. For
a successful power-up, there should be 6 peaks at VCDEL.
When a fault is detected, the device will latch off until either
EN is toggled or the input supply is recycled.
When the input voltage is higher than 2.4V, an internal
current source starts to charge CCDEL. During the initial slow
ramp, the device checks whether there is a fault condition. If
no fault is found during the initial ramp, CCDEL is discharged
after the first peak. VREF turns on at the peak of the first
ramp.
Initially the boost is not enabled so VBOOST rises to VIN-
VDIODE through the output diode. Hence, there is a step at
VBOOST during this part of the start-up sequence.
VBOOST soft-starts at the beginning of the third ramp, and is
checked at the end of this ramp. The soft-start ramp
depends on the value of the CDEL capacitor. For CDEL of
100nF, the soft-start time is ~7ms.
VOFF turns on at the start of the fourth peak.
VON is enabled at the beginning of the sixth ramp. VOFF and
VON are checked at end of this ramp.
Component Selection for Start-up Sequencing and
Fault Protection
The CREF capacitor is typically set at 220nF and is required
to stabilize the VREF output. The range of CREF is from
15
22nF to 1µF and should not be more than five times the
capacitor on CDEL to ensure correct start-up operation.
The CDEL capacitor is typically 100nF and has a usable
range from 22nF minimum to several microfarads (only
limited by the leakage in the capacitor reaching µA levels).
CDEL should be at least 1/5 of the value of CREF (see
Figure 22). Note that with 100nF on CDEL the fault time-out
will be typically 23ms and the use of a larger/smaller value
will vary this time proportionally (e.g. 1µF will give a fault
time-out period of typically 230ms).
Fault Sequencing
The ISL78020 and ISL78022 have an advanced fault
detection system, which protects the IC from both adjacent
pin shorts during operation and shorts on the output
supplies. A high quality layout/design of the PCB, in respect
of grounding quality and decoupling is necessary to avoid
falsely triggering the fault detection scheme (especially
during start-up). The user is directed to the layout guidelines
and component selection sections to avoid problems during
initial evaluation and prototype PCB generation.
VON-Slice Circuit
The VON-slice Circuit functions as a three way multiplexer,
switching the voltage on COM between ground, DRN and
SRC, under control of the start-up sequence and the CTL pin.
During the start-up sequence, COM is held at ground via an
NDMOS FET, with ~1k impedance. Once the start-up
sequence has completed, CTL is enabled and acts as a
multiplexer control such that if CTL is low, COM connects to
DRN through a 5Ω internal MOSFET, and if CTL is high,
COM connects to SRC via a 30Ω MOSFET.
The slew rate of start-up of the switch control circuit is mainly
restricted by the load capacitance at COM pin as in
Equation 18:
Δ-----V--
Δt
=
-(--R-----i--|-|---R-V----L-g--)---•-----C----L--
(EQ. 18)
Where Vg is the supply voltage applied to the switch control
circuit, Ri is the resistance between COM and DRN or SRC
including the internal MOSFET rDS(ON), the trace resistance
and the resistor inserted, RL is the load resistance of the
switch control circuit, and CL is the load capacitance of the
switch control circuit.
In the “Typical Application Circuit” on page 18, R8, R9 and
C8 give the bias to DRN based on Equation 19:
VDRN
=
V-----O----N------•----R----9-----+-----A----V----D----D-----•-----R----8-
R8 + R9
(EQ. 19)
Where: R10 can be adjusted to adjust the slew rate.
Op Amps
The ISL78020 and ISL78022 have 1 and 5 amplifiers
respectively. The op amps are typically used to drive the
FN6386.3
December 23, 2013