ISL59920_15 Datasheet, PDF (15/18 Pages) Intersil Corporation – Triple Analog Video Delay Lines

ISL59920, ISL59921, ISL59922, ISL59923
Test Pins
Three test pins are provided (Test R, Test G, Test B). During
normal operation, the test pins output pulses of current for a
duration of the overlap between the inputs, as shown in
Figure 36:
TEST_R pulse = RED_OUT (A) with respect to GREEN_OUT (B)
TEST_G pulse = GREEN_OUT with respect to BLUE_OUT
TEST_B pulse = BLUE_OUT with respect to RED_OUT
Averaging the current gives a direct measure of the delay
between the two edges. When A precedes B, the current pulse is
+50µA, and the output voltage goes up. When B precedes A, the
pulse is -50µA.
For the logic to work correctly, A and B must have a period of
overlap while they are high (a delay longer than the pulse width
cannot be measured).
Signals A and B are derived from the video input by comparing the
video signal with a slicing level, which is set by an internal DAC.
This enables the delay to be measured either from the rising edges
of sync-like signals encoded on top of the video or from a
dedicated set-up signal. The outputs can be used to set the correct
delays for the signals received.
The DAC level is set through the serial input by bits 1 through 4
directed to the test register (00).
Internal DAC Voltage
The slice level of the internal DAC may be programmed by writing
a byte to the test register (00). Table 3 shows the values that
should be written to change the DAC slice level. Please keep in
mind when writing to the test register that the LSB should always
be zero.
Referred to the input, the DAC slice range for the ISL5992x is cut
in half for gain of 2 mode because the slicing occurs after the
x1/x2 stage output amplifier. (In the EL9115, the slicing occurred
before the amplifier so the range of the DAC voltage was the
same for either gain of 1 or gain of 2).
4 ^{INTERNAL DAC SLICING LEVEL}
000wxyz0
COMPARATORS
RED_OUT
A
TEST_R
B
GREEN_OUT
A
TEST_G
B
BLUE_OUT
A
TEST_B
B
A
B
OUTPUT
FIGURE 36. DELAY DETECTOR
TABLE 3. DAC VOLTAGE RANGE - INPUT REFERRED
wxyz
DAC RANGE [mV]
(GAIN 1)
DAC RANGE [mV]
(GAIN 2)
1000
-400
-200
1001
-350
-175
1010
-300
-150
1011
-250
-125
1100
-200
-100
1101
-150
-75
1110
-100
-50
1111
-50
-25
0000
0
0
0001
50
25
0010
100
50
0011
150
75
0100
200
100
0101
250
125
0110
300
150
0111
350
175
NOTE: Test Register word = 000wxyz0. wxyz fed to DAC. z is LSB
Submit Document Feedback ₁₅
FN6826.4
August 27, 2015