X9408_14 Datasheet, PDF (14/20 Pages) Intersil Corporation – Quad Digitally Controlled Potentiometers

X9408
AC Timing (Over recommended operating condition)
SYMBOL
PARAMETER
f_SCL
t_CYC
t_HIGH
t_LOW
t_SU:STA
t_HD:STA
t_SU:STO
t_SU:DAT
t_HD:DAT
t_{R (Note 7)}
t_{F (Note 7)}
t_AA
t_DH
T_I
t_BUF
t_SU:WPA
t_HD:WPA
Clock frequency
Clock cycle time
Clock high time
Clock low time
Start setup time
Start hold time
Stop setup time
SDA data input setup time
SDA data input hold time
SCL and SDA rise time
SCL and SDA fall time
SCL low to SDA data output valid time
SDA Data output hold time
Noise suppression time constant at SCL and SDA inputs
Bus free time (prior to any transmission)
WP, A0, A1, A2 and A3 setup time
WP, A0, A1, A2 and A3 hold time
NOTES:
7. This parameter is not production tested. Parameter established by characterization.
HIGH-VOLTAGE WRITE CYCLE TIMING
SYMBOL
t_WR
PARAMETER
High-voltage write cycle time (store instructions)
XDCP TIMING
SYMBOL
PARAMETER
t_WRPO
t_WRL
t_WRID
Wiper response time after the third (last) power supply is stable
Wiper response time after instruction issued (all load instructions)
Wiper response time from an active SCL/SCK edge (increment/decrement instruction)
MIN
(Note 5)
2500
600
1300
600
600
600
100
30
50
50
1300
0
0
MAX
(Note 5)
400
300
300
900
UNIT
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TYP.
(Note 4)
5
MAX.
(Note 6)
10
UNIT
ms
MIN.
MAX.
(Note 5) (Note 6) UNIT
10
µs
10
µs
10
µs
14
FN8191.4
January 15, 2009