ISL6298-2CR3 Datasheet, PDF (14/17 Pages) Intersil Corporation – Li-ion/Li-Polymer Battery Charger

ISL6298
The N-channel MOSFET Q₁ buffers the FAULT pin. The
gate of Q₁ is connected to VIN or the V2P8 pin. When the
FAULT pin outputs a logic low signal, Q₁ is turned on and its
drain outputs a low signal as well. When FAULT is high
impedance, R₁ pulls the Q₁ drain to high. When the input
power is removed, the Q₁ gate voltage is also removed, thus
the Q₁ drain stays high.
NTC Thermistor Circuit Design
As shown in Figure 21, the thresholds for the NTC circuit are
formed by the internal voltage divider. Since the external
circuit is also a voltage divider, the accuracy of the bias
voltage, that is, the V2P8 pin voltage, becomes not critical.
Figure 25 shows the typical values of the thresholds as
percentages of the V2P8 pin voltage.
The NTC thermistor resistance is dependent on the ambient
temperature. Reducing temperature leads to the increase of
the resistance as well as the TEMP pin voltage. When the
TEMP pin voltage exceeds 50.3% of the bias voltage, an
under-temperature fault is triggered. On the other hand, if
the TEMP pin voltage is lower than 12.5%, an over
temperature fault occurs. The TEMP pin voltage has to fall
back to the 14.5% to 42.9% range for the fault be cleared, as
shown in Figure 25.
The ratio, K, of the TEMP pin voltage to the bias voltage is:
K = -_R----_T---^R--+--^T---_R----_U--
(EQ. 6)
Using the ratios at cold and hot temperature limits, as shown
in Figure 25, resulting in:
R_{-----C----O-----L---D-- = 7.08}
R_HOT
and
(EQ. 7)
R_U = 1.012 ⋅ R_COLD
(EQ. 8)
100%
where R_COLD and R_HOT are the NTC thermistor resistance
values at the cold and hot temperature limits respectively.
It is usually difficult to find an NTC thermistor that has the
exact ratio given in EQ. 7. A thermistor with a ratio larger
than 7.08, that is:
R_{-----C----O-----L---D--}
R_HOT
≥
7.08
(EQ. 9)
can be used in series with a regular resistor to form an
effective thermistor that has the right ratio, as shown in
Figure 26. With the series resistor R_S, EQ. 7 can be re-
written as:
R_{--R---S--S---+--+---}R_{--R---C-H---O--O--L--T--D-- = 7.08}
(EQ. 10)
Once the thermistor and the temperature limits are selected,
R_S and R_U can be calculated using
R_S
=
R_{-----C----O-----L---D-----–-----}7_---._--0_---8_----R_{-----H----O----T--}
6.08
(EQ. 11)
and
R_U = 1.012 ⋅ (R_S + R_COLD)
(EQ. 12)
To summarize, the NTC thermistor circuit design requires
three steps:
1. Find an NTC thermistor that satisfies EQ. 9. The
temperature limits are determined by the application
requirement.
2. Calculate the series resistance according to EQ. 11.
3. Calculate the pull-up resistance according to EQ. 12.
The following is a design example. The charger is designed
to charge the battery with the temperature range from 0°C to
55°C. The 10kΩ NTC thermistor NCP15XH103F03RC from
Murata (http://www.murata.com) satisfies EQ. 9. The
resistance table is given in Table 3. The typical resistance at
V_TMIN (50.3%)
V_TMIN- (42.9%)
TEMP
Pin
Voltage
V_TMAX+ (14.5%)
V_TMAX (12.5%)
0
Under
Temp
Over
Temp
FIGURE 25. CRITICAL VOLTAGE LEVELS FOR TEMP PIN
V2P8
R_U
TEMP
ISL6298
R_S
R_T
GND
FIGURE 26. EFFECTIVE NTC THERMISTOR CIRCUIT
14
FN9173.3
July 20, 2005