ISL59833_14 Datasheet, PDF (14/15 Pages) Intersil Corporation – 200MHz Single Supply Video Driver With Charge Pump

ISL59833
current never exceeds ±40mA, after which the electro-
migration limit of the process will be exceeded and the part
will be damaged. This limit is set by the design of the internal
metal interconnections.
POWER DISSIPATION
With the high output drive capability of the ISL59837, it is
possible to exceed the +150°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is
determined according to:
PD_MAX
=
T_{----J---M-----A----X-----–-----}T_{----A---M-----A----X--}
Θ_JA
(EQ. 1)
Where:
T_JMAX = Maximum junction temperature
T_AMAX = Maximum ambient temperature
Θ_JA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
for sourcing:
PD_MAX
=
V_S
×
I_SMAX
+
(V_S
–
V_OUTi)
×
-^V----^O----^U----^T----ⁱ
R_Li
(EQ. 2)
for sinking:
PD_MAX = V_S × I_SMAX + (V_OUTi – V_S) × I_LOADi
(EQ. 3)
Where:
V_S = Supply voltage
I_SMAX = Maximum quiescent supply current
V_OUT = Maximum output voltage of the application
R_LOAD = Load resistance tied to ground
I_LOAD = Load current
i = Number of output channels
By setting the two P_DMAX equations equal to each other, we
can solve the output current and R_LOAD to avoid the device
overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
Strip line design techniques are recommended for the input
and output signal traces. As with any high frequency device,
a good printed circuit board layout is necessary for optimum
performance. Lead lengths should be as short as possible.
The power supply pin must be well bypassed to reduce the
risk of oscillation. For normal single supply operation, where
the V_S- pin is connected to the ground plane, a single 4.7µF
tantalum capacitor in parallel with a 0.1µF ceramic capacitor
from V_S+ to GND will suffice. This same capacitor
combination should be placed at each supply pin to ground if
split-internal supplies are to be used. In this case, the V_S-
pin becomes the negative supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire-wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is also very important.
14
FN6334.1
March 5, 2007