X9268 Datasheet, PDF (13/24 Pages) Intersil Corporation – Dual Supply/Low Power/256-Tap/2-Wire Bus

X9268
Global XFR Wiper Counter Register (WCR) to Data Register (DR)
S Device Type
Device
S ^{Instruction DR/WCR} S S
T
A
R
T
Identifier
0101
Addresses _A
C
A3 A2 A1 A0 _K
Opcode
1000
Addresses
RB RA 0 0
A
C
K
T
O
P
HIGH-VOLTAGE
WRITE CYCLE
Transfer Wiper Counter Register (WCR) to Data Register (DR)
S
T
A
R
T
Device Type
Identifier
0101
Device
Addresses
S
A
Instruction
Opcode
DR/WCR
Addresses
SS
AT
C
CO
A3 A2 A1 A0 _K 1 1 1 0 RB RA 0 P0 _{K P}
HIGH-VOLTAGE
WRITE CYCLE
Transfer Data Register (DR) to Wiper Counter Register (WCR)
S Device Type
Device
S ^Instruction
DR/WCR
SS
T
A
R
T
Identifier
0101
Addresses _A
C
A3 A2 A1 A0 _K
Opcode
1101
Addresses
RB RA 0 P0
AT
CO
KP
Increment/Decrement Wiper Counter Register (WCR)
S Device Type
T Identifier
Device
Addresses
S
A
Instruction
Opcode
DR/WCR
Addresses
S
A
Increment/Decrement
(Sent by Master on SDA)
S
T
A
R
T
0
1
0
C
1 A3 A2 A1 A0 _K
0
0
1
0
0
0
0
C
O
P0 _K I/D I/D . . . . I/D I/D _P
Notes: (1) “MACK”/”SACK”: stands for the acknowledge sent by the master/slave.
(2) “A3 ~ A0”: stands for the device addresses sent by the master.
(3) “X”: indicates that it is a “0” for testing purpose but physically it is a “don’t care” condition.
(4) “I”: stands for the increment operation, SDA held high during active SCL phase (high).
(5) “D”: stands for the decrement operation, SDA held low during active SCL phase (high).
13
FN8172.1
June 21, 2005