ISL3241E_14 Datasheet, PDF (13/16 Pages) Intersil Corporation – QFN Packaged, ±15kV ESD Protected, +2.7V to +3.6V,250kbps, RS-232 Transmitters/Receivers with Separate Logic Supply Pin

ISL3241E, ISL3243E
3V/DIV.
T1_IN
5V/DIV.
T1_OUT
3V/DIV.
R1_OUT
V_CC = +3.3V, V_L = 1.8V
C1 TO C4 = 0.1µF
2µs/DIV.
FIGURE 15. LOOPBACK TEST AT 250kbps
Interconnection to 1.8V, and
2.5V Logic
Standard 3.3V powered RS-232 devices interface well with 3V
powered TTL compatible logic families (e.g., ACT and HCT).
The ISL324xE V_L supply pin allows interconnection to 1.8V or
2.5V logic. By connecting V_L to the same supply (1.8V or 2.5V)
powering the logic device, the ISL324XE logic outputs will
swing from GND to the logic V_CC.
±15kV ESD Protection
All pins on ISL324xE devices include ESD protection structures,
but the RS-232 pins (transmitter outputs and receiver inputs)
incorporate advanced structures which allow them to survive
ESD events up to ±15kV. The RS-232 pins are particularly
vulnerable to ESD damage because they typically connect to
an exposed port on the exterior of the finished product. Simply
touching the port pins, or connecting a cable, can cause an
ESD event that might destroy unprotected ICs. These new ESD
structures protect the device whether or not it is powered up,
protect without allowing any latchup mechanism to activate,
and don’t interfere with RS-232 signals as large as ±25V.
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD event
delivered to an IC during human handling. The tester delivers
the charge through a 1.5kΩ current limiting resistor, making
the test less severe than the IEC61000 test which utilizes a
330Ω limiting resistor. The HBM method determines an ICs
ability to withstand the ESD transients typically present during
handling and manufacturing. Due to the random nature of
these events, each pin is tested with respect to all other pins.
The RS-232 pins on “E” family devices can withstand HBM ESD
events to ±15kV.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-232 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The lower
current limiting resistor coupled with the larger charge storage
capacitor yields a test that is much more severe than the HBM
test. The extra ESD protection built into this device’s RS-232
pins allows the design of equipment meeting level 4 criteria
without the need for additional board level protection on the
RS-232 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the IC
pin until the voltage arcs to it. The current waveform delivered
to the IC pin depends on approach speed, humidity,
temperature, etc., so it is difficult to obtain repeatable results.
The “E” device RS-232 pins withstand ±15kV air-gap
discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
13
FN6768.2
June 18, 2012