ISL28270_0708 Datasheet, PDF (13/18 Pages) Intersil Corporation – Dual and Quad Channel Micropower, Single Supply, Rail-to-Rail Input and Output (RRIO) Instrumentation Amplifiers

ISL28270, ISL28273, ISL28470
Typical Performance Curves
V₊ = +5V, V_- = 0V V_CM = 1/2V₊, V_EN = V-, R_L = Open, T_A = +25°C, unless otherwise specified.
(Continued)
0.75
n = 1000
0.70
MAX
0.65
0.60
0.55
MEDIAN
0.50
0.45
0.40
0.35
-40 -20 0
MIN
20 40 60 80 100 120
TEMPERATURE (°C)
FIGURE 47. + SLEW RATE vs TEMPERATURE,
INPUT = ±0.015V AT GAIN = +10
0.80
n = 1000
0.75
MAX
0.70
0.65
0.60
MEDIAN
0.55
0.50
MIN
0.45
0.40
-40 -20 0
20 40 60 80 100 120
TEMPERATURE (°C)
FIGURE 48. - SLEW RATE vs TEMPERATURE,
INPUT = ±0.15V AT GAIN = +10
Pin Descriptions
ISL28270 ISL28273 ISL28470
EQUIVALENT
16 Ld QSOP 16 Ld QSOP 28 Ld QSOP PIN NAMES
CIRCUIT
PIN FUNCTION
2, 15
2, 15
1, 13
16, 28
OUT_A, OUT_B,
OUT_C, OUT_D
Circuit 3
Output Voltage. A complementary Class AB common-source output
stage drives the output of each channel. When disabled, the outputs are
in a high impedance state
3, 14
4, 13
5, 12
6, 11
7, 10
3, 14
4, 13
5, 12
6, 11
7, 10
2, 12
17, 27
3, 11
18, 26
4, 10
19, 25
5, 9
20, 24
6, 8
21, 23
FB+_A, FB+_B,
FB+_C, FB+_D
FB-_A, FB-_B,
FB-_C, FB-_D
IN-_A, IN-_B,
IN-_C, IN-_D
IN+_A, IN+_B,
IN+_C, IN+_D
EN_A, EN_B,
EN_C, EN_D
Circuit 1A,
Circuit 1B
Circuit 1A,
Circuit 1B
Circuit 1A,
Circuit 1B
Circuit 1A,
Circuit 1B
Circuit 2
Positive Feedback high impedance terminals. ISL28270 and ISL28470
input circuit is shown in Circuit 1A, and the ISL28273 input circuit is
shown in Circuit 1B. It can be used as a REF terminal to adjust or level
shift the output.
ISL28273: to avoid offset drift, it is recommended that the terminals of
the ISL28273 are not overdriven beyond 1V and the input current must
never exceed 5mA.
Negative Feedback high impedance terminals. The FB- pins connect to
an external resistor divider to individually set the desired gain of the in-
amp. ISL28270 and ISL28470 input circuit is shown in Circuit 1A, and the
ISL28273 input circuit is shown in Circuit 1B.
ISL28273: to avoid offset drift, it is recommended that the terminals of
the ISL28273 are not overdriven beyond 1V and the input current must
never exceed 5mA.
High impedance Inverting input terminals. Connect to the low side of the
input source signal. ISL28270 and ISL28470 input circuit is shown in
Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B.
ISL28273: to avoid offset drift, it is recommended that the terminals of
the ISL28273 are not overdriven beyond 1V and the input current must
never exceed 5mA.
High impedance Non-inverting input terminals. Connect to the high side
of the input source signal. ISL28270 and ISL28470 input circuit is shown
in Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B.
ISL28273: to avoid offset drift, it is recommended that the terminals of
the ISL28273 are not overdriven beyond 1V and the input current must
never exceed 5mA.
Active LOW logic pins. When pulled above 2V, the corresponding
channel turns off and OUT is high impedance. A channel is enabled
when pulled below 0.8V. Built-in pull-downs define each EN pin LOW
when left floating.
16
16
7
V₊
Circuit 4 Positive Supply terminal shared by all channels.
13
FN6260.4
August 3, 2007