ISL28194_08 Datasheet, PDF (13/16 Pages) Intersil Corporation – Ultra-Small, 330nA and 1uA Single Supply, Rail-to-Rail Input/Output (RRIO) Op Amps

AC Test Circuits
5V
-
+
V_IN
EN
V+/2
ISL28194, ISL28195
V_OUT
10k
1k
10
5V
-
+
V_IN
EN
V_CM = V+/2
V_OUT
10k
FIGURE 55. TEST CIRCUIT FOR A_V = +1
Applications Information
Introduction
The ISL28194 and ISL28195 are CMOS rail-to-rail input and
output (RRIO) micropower operational amplifiers. These
devices are designed to operate from single supply (1.8V to
5.5V) and have an input common mode range that extends to
the positive rail and to the negative supply rail for true rail-to-rail
performance. The CMOS output can swing within tens of
millivolts to the rails. Featuring worst-case maximum supply
currents of 0.5µA and 1.5µA for the ISL28194 and ISL28195
respectively, these amplifiers are ideally suited for solar and
battery-powered applications.
Input Protection
All input terminals have internal ESD protection diodes to
both positive and negative supply rails, limiting the input
voltage to within one diode beyond the supply rails. Both the
ISL28194 and ISL28195 have a maximum input differential
voltage that includes the rails (-V -0.5V to +V +0.5V).
Rail-to-Rail Output
A pair of complementary MOSFET devices are used to
achieve the rail-to-rail output swing. The NMOS sinks current
to swing the output in the negative direction. The PMOS
sources current to swing the output in the positive direction.
The ISL28194 and ISL28195 will typically swing to within
40mV or less to either rail with a 100kΩ load (reference
Figures 49 through 52).
Enable/Disable Feature
Both parts offer an EN pin that enables the device when pulled
high. The enable threshold is referenced to the -V terminal and
has a level proportional to the total supply voltage (reference
Figures 21 and 22 for EN threshold vs supply voltage). The
enable circuit has a delay time that changes as a function of
supply voltage. Figures 23 through 26 show the effect of
supply voltage on the enable and disable times. For supply
voltages less than 3V, it is recommended that the user
account for the increase enable/disable delay time.
FIGURE 56. TEST CIRCUIT FOR A_V = +101
In the disabled state (output in a high impedance state), the
supply current is reduced to typical of only 2nA. By disabling
the devices, multiple parts can be connected together as a
MUX. In this configuration, the outputs are tied together in
parallel and a channel can be selected by the EN pin. The
EN pin should never be left floating. The EN pin should be
connected directly to the V+ supply when not in use.
The loading effects of the feedback resistors of the disabled
amplifier must be considered when multiple amplifier outputs
are connected together.
Proper Layout Maximizes Performance
To achieve the maximum performance of the high input
impedance, care should be taken in the circuit board layout.
The PC board surface must remain clean and free of moisture
to avoid leakage currents between adjacent traces. Surface
coating of the circuit board will reduce surface moisture and
provide a humidity barrier, reducing parasitic resistance on the
board. When input leakage current is a concern, the use of
guard rings around the amplifier inputs will further reduce
leakage currents. Figure 57 shows a guard ring example for a
unity gain amplifier that uses the low impedance amplifier
output at the same voltage as the high impedance input to
eliminate surface leakage. The guard ring does not need to be
a specific width, but it should form a continuous loop around
both inputs. For further reduction of leakage currents,
components can be mounted to the PC board using Teflon
standoff insulators.
HIGH IMPEDANCE INPUT
V+
IN
FIGURE 57. GUARD RING EXAMPLE FOR UNITY GAIN
AMPLIFIER
13
FN6236.4
October 1, 2008