X28HC64_15 Datasheet, PDF (12/18 Pages) Intersil Corporation – 5 Volt, Byte Alterable EEPR

X28HC64
Write Cycle Limits Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits
established by characterization and are not production tested.
PARAMETER
SYMBOL
TYP
MIN
(Note 3)
MAX
UNIT
Write Cycle Time (Note 7)
t_WC
2
5
ms
Address Setup Time
t_AS
0
ns
Address Hold Time
t_AH
50
ns
Write Setup Time
t_CS
0
ns
Write Hold Time
t_CH
0
ns
CE Pulse Width
t_CW
50
ns
OE High Setup Time
t_OES
0
ns
OE High Hold Time
t_OEH
0
ns
WE Pulse Width
t_WP
50
ns
WE HIGH Recovery (Note 8)
t_WPH
50
ns
Data Valid (Note 8)
t_DV
1
µs
Data Setup
t_DS
50
ns
Data Hold
t_DH
0
ns
Delay to Next Write (Note 8)
t_DW
10
µs
Byte Load Cycle
t_BLC
0.15
100
µs
NOTES:
7. t_WC is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time the device
requires to automatically complete the internal write operation.
8. t_WPH and t_DW are periodically sampled and not 100% tested.
WE Controlled Write Cycle
ADDRESS
CE
t_AS
t_AH
t_CS
t_WC
t_CH
OE
WE
DATA IN
DATA OUT
t_OES
t_DV
t_OEH
t_WP
DATA VALID
t_DS
t_DH
HIGH Z
12
FN8109.3
August 18, 2015