ISL6552 Datasheet, PDF (12/18 Pages) Intersil Corporation – Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller

ISL6552
R_FB ^RIN C_c
FB
COMP
ISL6552
ERROR
AMPLIFIER
+-
SAWTOOTH
GENERATOR
CORRECTION
+
COMPARATOR
+-
PWM
CIRCUIT
-
REFERENCE
DAC
DIFFERENCE
+
-
TO OTHER
CHANNELS
TO OVER
CURRENT
+
-
TRIP
COMPARATOR
AVERAGING
REFERENCE
CURRENT
SENSING
CURRENT
SENSING
FROM
OTHER
CHANNELS
PWM
ISEN
V_IN
Q1 ^L01
HIP6601
Q2
I_L
PHASE
R_ISEN
ONLY ONE OUTPUT
STAGE SHOWN
INDUCTOR
CURRENT(S)
FROM
OTHER
CHANNELS
V_CORE
FIGURE 7. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM SHOWING CURRENT AND VOLTAGE SAMPLING
Current Sensing and Balancing
Overview
The ISL6552 samples the on-state voltage drop across each
synchronous rectifier FET, Q2, as an indication of the
inductor current in that phase, see Figure 7. Neglecting AC
effects (to be discussed later), the voltage drop across Q2 is
simply r_DS(ON)(Q2) x inductor current (I_L). Note that I_L, the
inductor current, is either 1/2, 1/3, or 1/4 of the total current
(I_LT), depending on how many phases are in use.
The voltage at Q2’s drain, the PHASE node, is applied to the
R_ISEN resistor to develop the I_ISEN current to the ISL6552
ISEN pin. This pin is held at virtual ground, so the current
through R_ISEN is I_L x r_DS(ON)(Q2)/R_ISEN.
The I_ISEN current provides information to perform the
following functions:
1. Detection of an over-current condition
2. Reduce the regulator output voltage with increasing load
current (droop)
3. Balance the I_L currents in multiple channels
Over-Current, Selecting R_ISEN
The current detected through the R_ISEN resistor is
averaged with the current(s) detected in the other 1, 2, or 3
channels. The averaged current is compared with a
trimmed, internally generated current, and used to detect
an over-current condition.
The nominal current through the R_ISEN resistor should be
50µA at full output load current, and the nominal trip point for
over-current detection is 165% of that value, or 82.5µA.
Therefore, R_ISEN = I_L x r_DS(ON) (Q2)/50µA.
For a full load of 25A per phase, and an r_DS(ON) (Q2) of
4mΩ, R_ISEN = 2kΩ.
The over-current trip point would be 165% of 25A, or ~41A
per phase. The R_ISEN value can be adjusted to change the
over-current trip point, but it is suggested to stay within
±25% of nominal.
Droop, Selection of R_IN
The average of the currents detected through the R_ISEN
resistors is also steered to the FB pin. There is no DC return
path connected to the FB pin except for R_IN, so the average
current creates a voltage drop across R_IN. This drop
increases the apparent V_CORE voltage with increasing load
current, causing the system to decrease V_CORE to maintain
balance at the FB pin. This is the desired “droop” voltage used
to maintain V_CORE within limits under transient conditions.
With a high dv/dt load transient, typical of high performance
microprocessors, the largest deviations in output voltage occur
at the leading and trailing edges of the load transient. In order to
fully utilize the output-voltage tolerance range, the output
voltage is positioned in the upper half of the range when the
output is unloaded and in the lower half of the range when the
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