ISL28617 Datasheet, PDF (12/18 Pages) Intersil Corporation – 40V Precision Instrumentation Amplifier with Differential ADC Driver

ISL28617
Applications Information
Section 1 contains the ISL28617 functional and performance
objectives and description of operation.
Section 2 contains the application circuit design equations and
guidelines for achieving the desired DC and AC performance
levels.
Section 3 provides equations for predicting DC offset voltage and
noise of the finished design.
1. General Description
The ISL28617 Instrumentation Amplifier was developed to
accomplish the following:
• Provide a fully differential, rail-to-rail output for optimally
driving ADCs.
• Limit the output swing to prevent output overdrive.
• Allow any gain, including attenuation.
• Maximize gain accuracy by removing on-chip component
tolerances and external PC board parasitic resistance.
• Enable user control of amplifier precision level with choice of
external resistor tolerance.
• Maintain CMRR>100dB and remove CMRR sensitivity to gain
resistor tolerance.
• Provide a level shift interface from bipolar analog input signal
sources to unipolar, and bipolar ADC output terminations.
Functional Description (Figure 29)
Figure 29 shows the functional block diagram for the ISL28617.
Input G_M Amplifier
The input stage consists of high performance, wide band
amplifiers A1, A2, G_M drive transistors Q1, Q2, and input gain
resistor R_IN. Current drive for Q1 and Q2 emitters are provided by
matched pair of 100µA current sinks. A unity gain buffer from
each input (IN+, IN-) to the terminals of the input resistor, R_IN, is
formed by the connection of the Kelvin resistor sense pins and
drive pins to the terminals of the input resistor, as shown in
Figure 29. In this configuration, the voltage across the input
resistor R_IN is equal to the input differential voltage across IN+
and IN-.
The input G_M stage operates by creating a current difference in
the collector currents Q1 and Q2 in response to the voltage
difference between the IN+ and IN- pins. When the input voltage
applied to the IN+ and IN- pins is zero, the voltage across the
terminals of the gain resistor R_IN, is also zero. Since there is no
current flow through the gain resistor, the transistors Q1, and Q2
collector currents I1, I2 are equal.
A change in the input differential voltage causes an equivalent
voltage drop across the input gain resistor R_IN, and the resulting
current flow through R_IN, causes an imbalance in Q1, Q2
collector currents I1, I2, given by:
I₁= 100µA + (V_IN+- V_IN-)/R_IN
(EQ. 1)
I₂= 100µA - (V_IN+- V_IN-)/R_IN
(EQ. 2)
Feedback G_M Amplifier
The feedback amplifiers A3, A4 form a differential trans
conductance amplifier identical to the input stage. The input
terminals (V_FB+, V_FB-) connect to the ISL28617 differential output
terminals (+V_OUT, -V_OUT) so that the output voltage also appears
across the feedback gain resistor R_FB.
Operation is the same as the input G_M stage and the differential
currents I3, I4 are given by:
I₃ = 100µA - {(+V_OUT) - (-V_OUT)}/R_FB
(EQ. 3)
I₄ =100µA +{(+V_OUT) - (-V_OUT)}/R_FB
(EQ. 4)
Error Amplifier A5, Output Amplifier A6
(Figure 29)
Amplifiers A5 and A6 act together to form a high gain,
differential I/O trans-impedance amplifier. Differential current
amplifier A5 sums the differential currents (I1+I3, I2+I4) from
the input and feedback G_M amplifiers. From that summation, a
differential error voltage is sent to A6, which generates the rail-
to-rail differential output drive to the +V_OUT and -V_OUT pins.
The external connection of the output pins to the feedback
amplifier closes a servo loop where a change in the differential
input voltage is converted into differential current imbalances at
I1, I2 (Equations 1, 2) at the summing node inputs to A5. Current
I1 sums with current I3 from the feedback stage, and I2 sums
with I4. A5 senses the difference between current pairs I1, I3 and
I2, I4. A difference voltage is generated, amplified and fed back
to the feedback amplifier, which creates correction currents at I3,
I4 to match the currents at I1, I2 (Equations 3, 4).
Therefore, at equilibrium:
I₁ = I₃ and I₂ = I₄
(EQ. 5)
Combining Equations 1 and 3, (and their complements I2 and
I4), and solving for V_OUT as a function of V_IN, R_IN and R_FB, yields
Equation 6:
V_OUT = V_IN*R_FB/R_IN ;
Where V_OUT = (+V_OUT) - (-V_OUT) and VIN = IN+ - IN-
(EQ. 6)
Equation 6 can be rearranged to form the gain Equation 7:
Gain = V_OUT/V_IN = R_FB/R_IN
(EQ. 7)
which is general form of the gain Equation for the ISL28617.
2. Designing with the ISL28617
To complete a working design, the following procedure is
recommended and explained in this section:
1. Define the output voltage swing.
2. Set the feedback resistor value, R_FB
3. Set the input gain resistor value, R_IN
3. Set the V_CO, V_EO power supply voltages
4. Set the V_CC and V_EE supply voltages
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FN6562.0
May 25, 2012