ISL28158_08 Datasheet, PDF (12/17 Pages) Intersil Corporation – Micro-power Single and Dual Precision Rail-to-Rail Input-Output (RRIO) Low Input Bias Current Op Amps

ISL28158, ISL28258
Pin Descriptions
ISL28158
(6 Ld SOT-23)
4
ISL28158
(8 Ld SOIC)
1, 5
2
ISL28258
(8 Ld SOIC)
(8 Ld MSOP)
2 (A)
6 (B)
PIN NAME
NC
IN-
IN- (A)
IN- (B)
FUNCTION
Not connected
inverting input
EQUIVALENT CIRCUIT
V+
IN-
IN+
V-
Circuit 1
3
3
IN+
Non-inverting input
3 (A)
IN+ (A)
5 (B)
IN+ (B)
See Circuit 1
2
4
4
V-
Negative supply
V+
CAPACITIVELY
COUPLED
ESD CLAMP
1
6
OUT
Output
1 (A)
OUT (A)
7 (B)
OUT (B)
6
7
8
5
8
V+
Positive supply
EN
Chip enable
V-
Circuit 2
V+
OUT
V-
Circuit 3
See Circuit 2
V+
Applications Information
Introduction
The ISL28158 is a single CMOS rail-to-rail input, output
(RRIO) operational amplifier with an enable feature. The
ISL28258 is a dual version without the enable feature. Both
devices are designed to operate from single supply (2.4V to
5.5V) or dual supplies (±1.2V to ±2.75V).
Rail-to-Rail Input/Output
These devices feature PMOS inputs with an input common
mode range that extends up to 0.3V beyond the V+ rail, and
to 0.1V below the V- rail. The CMOS output features
excellent drive capability, typically swinging to within 6mV of
either rail with a 100kΩ load.
LOGIC
PIN
V-
Circuit 3
Results of Over-Driving the Output
Caution should be used when over-driving the output for
long periods of time. Over-driving the output can occur in two
ways. 1) The input voltage times the gain of the amplifier
exceeds the supply voltage by a large value or, 2) the output
current required is higher than the output stage can deliver.
These conditions can result in a shift in the Input Offset
Voltage (V_OS) as much as 1µV/hr. of exposure under these
conditions.
IN+ and IN- Input Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. They also contain
back-to-back diodes across the input terminals (see “Pin
Descriptions” on page 12 - Circuit 1). For applications where
the input differential voltage is expected to exceed 0.5V, an
12
FN6377.3
August 29, 2008