ISL1533A_14 Datasheet, PDF (12/14 Pages) Intersil Corporation – Dual Channel Differential DSL Line Driver

ISL1533A
Applications Information
Figure 38 is a typical application circuit for ISL1533A as an
ADSL2+ CO line driver. The driver output stage has been sized
to provide full ADSL2+ CO power level of 20dBm onto the
telephone lines. The actual peak output voltages and currents
will depend on the transformer turn ratio. The ISL1533A is
designed to support 450mA of output current, which exceeds
the level required for 1:1 transformer ratio.
T_X+
FROM
AFE _2RG
667
T_X-
V_S+
+
- _VS-
R_F
R_T
25 _0.22µF
TXFR
1:1
3k
V_S+
+
- _VS-
R_F
R_T
25 _0.22µF
3k
100
FIGURE 38. TYPICAL ADSL CO LINE DRIVER
Power Control Function
The ISL1533A contains two forms of power control operation.
Two digital inputs, C₀ and C₁, can be used to control the supply
current of the ISL1533A drive amplifiers. C₀ and C₁ inputs are
designed to pull high initially. Floating these inputs will put the
device in disable mode.
As the supply current is reduced, the ISL1533A will start to
exhibit slightly higher levels of distortion and the frequency
response will be limited. The four power modes of the
ISL1533A are set up as shown in Table 1.
TABLE 1. POWER MODES OF THE ISL1533A
C₁
C₀
OPERATION
0
0
I_S Full Power Mode
0
1
3/4 I_S Power Mode
1
0
1/2 I_S Power Mode
1
1
Power-down
Another method for controlling the power consumption of the
ISL1533A is to connect a resistor from the I_ADJ pin to ground.
When the I_ADJ pin is grounded (the normal state), the supply
current per channel is as shown in the “SUPPLY
CHARACTERISTICS” on page 4 of the “Electrical Specifications”
table. When a resistor is inserted, the supply current is scaled
according to Figure 27 on page 10 of the “Typical Performance
Curves”. Both methods of power control can be used
simultaneously. In this case, positive and negative supply
currents (per amp) are given by Equation 1.
I_S+
=
0.34
m
A
+
--------------⁵----^.-⁰----⁶----^m-----^A----------------
1 + R_SET / 1300
x
3/4C₁ + 1/2C₀ - C₁  C₀  1/4
I_S-
=
-------------^----⁵---^.--⁰---⁶----^m-----^A---------------
1 + R_SET / 1300
x
3/4C₁ + 1/2C₀ - C₁  C₀  1/4
(EQ. 1)
Feedback Resistor Value
The bandwidth and peaking of the amplifiers varies with
feedback and gain settings. The feedback resistor values can
be adjusted to produce an optimal frequency response. Table 2
shows the recommended resistor values that produce an
optimal driver frequency response (1dB of peaking).
.
TABLE 2. OPTIMUM DRIVER FEEDBACK RESISTOR
FOR VARIOUS GAINS
DRIVER VOLTAGE GAIN
SUPPLY VOLTAGE
5
10
±12V
3k
2k
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FN8648.0
May 9, 2014