ICM7244 Datasheet, PDF (12/13 Pages) Intersil Corporation – 8-Character, Microprocessor Compatible, 8-Character, Microprocessor Compatible,

ICM7244
CHARacter drive lines ( Figure 3). An inter-character
blanking signal is derived from the pre-divider. An
additional comparator on the OSC/OFF input detects a
level lower than the relaxation oscillator's range, and
blanks the display, disables the DISPlay FULL output (if
active), and clears the pre-divider and Multiplex Counter.
This puts the circuit in a low-power-dissipation mode in
which all outputs are effectively open circuits, except for
parasitic diodes to the supply lines. Thus a display
connected to the output may be driven by another circuit
(including another ICM7244) without driver conflicts.
Display Output
The output of the Multiplex Counter is decoded and
multiplexed into the address input of the Data Memory,
except during WR operations (in Sequential Access mode,
with SEN high and DISPlay FULL low), when it scans
through the display data. The address decoder also drives
the CHARacter outputs, except during the inter-character
blanking interval (nominally about 5µs). Each CHARacter
output lasts nominally about 300µs, and is repeated
nominally every 2.5ms, i.e., at a 400Hz rate (times are
based on internal oscillator without external capacitor).
The 6 bits read from the Data Memory are decoded in the
ROM to the 17 segment signals, which drive the SEGment
outputs. Both CHARacter and SEGment outputs are
disabled during WR operations (with SEN high and
DISPlay FULL Low for Sequential Access mode). The
outputs may also be disabled by pulling OSC/OFF low.
The decode pattern from 6 bits to 17 segments is done by a
ROM pattern according to the ASCll font shown. Custom
decode patterns can be arranged, within these limitations,
by consultation with the factory.
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FN6675.1
January 22, 2009