HSP45116A Datasheet, PDF (12/17 Pages) Intersil Corporation – Numerically Controlled Oscillator/ Modulator

HSP45116A
Rounding
The operation of the HSP45116A is identical to the
HSP45116 with the exception of a programmable rounding
option added for the data outputs. The added functionality
was achieved by using one of the HSP45116’s reserved
Configuration Registers to specify rounding precision and
replacing a V_CC pin with a round enable (RND) input. When
RND is “high”, rounding is disabled, and the HSP45116A
functions as a pin-for-pin equivalent of the HSP45116. When
RND is active “low” rounding is enabled. The RND input
replaces V_CC on PIN 75 of the 160 Lead MQFP package as
seen in the Pinout Diagram.
The Round Control Register is loaded by placing the round
control value on C15-0, setting AD1-0 = 11, setting CS = 0,
and forcing a low to high transition on the WR input. The
rounding operation is determined by the least significant 8
bits loaded into the Control Register as shown in Table 6.
The least significant four bits (C3-0) loaded into the register
govern rounding of the real and imaginary outputs of the
Complex Accumulator (ACC). The next more significant four
bits (C7-4) govern the rounding of the complex outputs of the
complex multiply accumulator (CMAC). The real and
imaginary outputs from the CMAC or ACC are rounded to
the same precision. The rounding is perform by adding a
“one” to the bit position below the least significant bit desired
in the output. For example, for a configuration that rounds to
the most significant 20 bits of the CMAC output, a “one”
would be added to bit position 2^-14 (See Figure 3 for output
bit weightings).
TABLE 6. ROUNDING CONTROL
ROUND CONTROL REGISTER
C15-8
C7-4
C3-0
UNUSED
CMAC
ROUNDING
ACC
ROUNDING
ROUNDING OPERATION
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
No Rounding
CMAC outputs rounded to most significant 20 bits, bit positions -2⁴ to 2^-15
ACC outputs rounded to most significant 20 bits, bit positions -2⁴ to 2^-15
CMAC outputs rounded to most significant 19 bits, bit positions -2⁴ to 2^-14
ACC outputs rounded to most significant 19 bits, bit positions -2⁴ to 2^-14
CMAC outputs rounded to most significant 18 bits, bit positions -2⁴ to 2^-13
ACC outputs rounded to most significant 18 bits, bit positions -2⁴ to 2^-13
CMAC outputs rounded to most significant 17 bits, bit positions -2⁴ to 2^-12
ACC outputs rounded to most significant 17 bits, bit positions -2⁴ to 2^-12
CMAC outputs rounded to most significant 16 bits, bit positions -2⁴ to 2^-11
ACC outputs rounded to most significant 16 bits, bit positions -2⁴ to 2^-11
CMAC outputs rounded to most significant 15 bits, bit positions -2⁴ to 2^-10
ACC outputs rounded to most significant 15 bits, bit positions -2⁴ to 2^-10
CMAC outputs rounded to most significant 14 bits, bit positions -2⁴ to 2^-9
ACC outputs rounded to most significant 14 bits, bit positions -2⁴ to 2^-9
CMAC outputs rounded to most significant 13 bits, bit positions -2⁴ to 2^-8
ACC outputs rounded to most significant 13 bits, bit positions -2⁴ to 2^-8
CMAC outputs rounded to most significant 12 bits, bit positions -2⁴ to 2^-7
ACC outputs rounded to most significant 12 bits, bit positions -2⁴ to 2^-7
CMAC outputs rounded to most significant 11 bits, bit positions -2⁴ to 2^-6
ACC outputs rounded to most significant 11 bits, bit positions -2⁴ to 2^-6
CMAC outputs rounded to most significant 10 bits, bit positions -2⁴ to 2^-5
ACC outputs rounded to most significant 10 bits, bit positions -2⁴ to 2^-5
CMAC outputs rounded to most significant 9 bits, bit positions -2⁴ to 2^-4
ACC outputs rounded to most significant 9 bits, bit positions -2⁴ to 2^-4
XXXXXXXX
1101-1111
1101-1111
Undefined
3-208