HSP43220_04 Datasheet, PDF (12/18 Pages) Intersil Corporation – Decimating Digital Filter

HSP43220
+5V
CK_IN
FIR_CK
STARTIN
ASTARTIN
DDF
STARTOUT
TO OTHER DDF'S
+5V
ASTARTIN
STARTOUT
NC
CK_IN
FIR_CK
STARTIN
DDF
FIGURE 12. ASYNCHRONOUS START UP
+5V
CK_IN
FIR_CK
STARTIN
ASTARTIN
DDF
STARTOUT
+5V
CK_IN
FIR_CK
ASTARTIN
STARTOUT
NC
STARTIN
DDF
FIGURE 13. SYNCHRONOUS START UP
Chip Set Application
The HSP43220 is ideally suited for narrow band filtering in
Communications, Instrumentation and Signal Processing
applications. The HSP43220 provides a fully integrated
solution to high order decimation filtering.
The combination of the HSP43220 and the HSP45116
(which is a NCOM Numerically Controlled Oscillator /
Modulator) provides a complete solution to digital receivers.
The diagram in Figure 14 illustrates this concept.
The HSP45116 down converts the signal of interest to
baseband, generating a real component and an imaginary
component. A HSP43220 then performs low pass filtering
and reduces the sampling rate of each of the signals.
The system scenario for the use of the DDF involves a
narrow band signal that has been over-sampled. The signal
is over-sampled in order to capture a wide frequency band
containing many narrow band signals. The NCOM is “tuned”
to the frequency of the signal of interest and performs a
complex down conversion to baseband of this signal, which
results in a complex signal centered at baseband. A pair of
DDFs then low pass filters the NCOM output, extracting the
signal of interest.
Design Trade-Off Considerations
Equation 2 in the Functional Description section expresses
the relationship between the number of TAPS which can be
implemented in the FIR as a function of CK_IN, FIR_CK,
H_DEC, F_DEC. Table 1 provides a tradeoff of these
parameters. For a given speed grade and the ratio of the
clocks, and assuming minimum decimation in the HDF, the
number of FIR taps that can be implemented is given in
Equation 2.
HSP45116
NCOM
COS (WT)
HSP43220
DDF
SAMPLED
INPUT
DATA
SIN (WT)
HSP43220
DDF
0
10MHz
0
20MHz
0
FIGURE 14. DIGITAL CHANNELIZER
12