ZL2102 Datasheet, PDF (11/58 Pages) Intersil Corporation – 6A Digital Integrated Synchronous Step-Down DC/DC Regulator with Auto Compensation

ZL2102
Input voltage ranges and connections are shown in Figure 10.
VIN
VIN
VIN
VDDS
VDDS
VDDS
VR
VRA
VR
VRA
VR
VRA
VIN =
4.5V to 5.5V
VIN =
5.5V to 7.5V
VIN =
7.5V to 14V
FIGURE 10. INPUT SUPPLY CONNECTIONS
The internal bias regulators, VR and VRA, are not designed to be
outputs for powering other circuitry. Do not attach external loads
to any of these pins. Only the multi-mode pins may be connected
to the V2P5 pin for logic HIGH settings.
MULTI-MODE PINS
In order to simplify circuit design, the ZL2102 incorporates
patented multi-mode pins that allow the user to easily configure
many aspects of the device with no programming. Most power
management features can be configured using these pins. The
multi-mode pins can respond to four different connections as
shown in Table 1. These pins are sampled once when power is
applied or by issuing a PMBus Restore command.
Pin-strap Settings: This is the simplest implementation method,
as no external components are required. Using this method, each
pin can take on one of three possible states: LOW, OPEN, or
HIGH. These pins can be connected to the V25 pin for logic HIGH
settings. Using a single pin, one of three settings can be selected.
Resistor Settings: This method allows a greater range of
adjustability when connecting a finite value resistor (in a
specified range) between the multi-mode pin and SGND.
Standard 1% resistor values are used, and only every fourth E96
resistor value is used so the device can reliably recognize the
value of resistance connected to the pin while eliminating the
error associated with the resistor accuracy. Up to 31 unique
selections are available using a single resistor.
TABLE 1. MULTI-MODE PIN CONFIGURATION
PIN TIED TO
VALUE
LOW (Logic LOW)
< 0.8 VDC
OPEN (N/C)
No connection
HIGH (Logic HIGH)
> 2.0 VDC
Resistor to SGND
Set by resistor value
Multi-mode
Pin
Logic
H igh
Open
Logic
Low
Mul ti -mode
Pin
Pin -stra p
Settings
Resistor
Settings
FIGURE 11. PIN-STRAP AND RESISTOR SETTING EXAMPLES
SMBus: Most ZL2102 functions/parameters can be configured
via the SMBus interface using standard PMBus commands. The
PMBus commands description section of this document explains
the use of the available PMBus commands in detail.
CONFIGURABLE PINS
Many operating parameters can be set using the multi-mode pin
setup method: SMBus address (SA), output voltage (VSET), clock
synchronization and sequencing options (CFG), switching
frequency (SYNC), soft-start delay, soft-start ramp, input under
voltage lock-out (SS), and automatic loop compensation settings
(FC). These pins are checked once during start-up only. Changes
to the settings of these pins will not be read until the device's
power supply has been cycled off and on.
The device's SMBus address is the only parameter that must be
set by the multi-mode pins. All others are configurable using
PMBus commands.
SMBus Device Address Selection (SA)
The ZL2102 provides an SMBus digital interface that enables the
user to configure all aspects of the device operation as well as
monitor the input and output parameters. The ZL2102 is
compatible with SMBus version 2.0 and includes an SALRT line
to help mitigate bandwidth limitations related to continuous fault
monitoring.
When communicating with multiple devices using the SMBus
interface, each device must have its own unique address so the
host can distinguish between the devices. The device address
can be set according to the pin-strap options listed in Table 2. The
SMBus address cannot be changed with a PMBus command.
11
FN8440.1
August 22, 2013