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ISL21400 Datasheet, PDF (11/17 Pages) Intersil Corporation – Programmable Temperature Slope Voltage Reference
ISL21400
Register Descriptions
Addr
0
1
2
3
4
D7
(MSB)
VREF7
TS7
D7
D7
D7
D6
VREF6
TS6
D6
D6
D6
TABLE 1. ISL21400 REGISTER BIT MAP
D5
VREF5
TS5
D5
D5
D5
D4
VREF4
TS4
D4
D4
D4
D3
VREF3
TS3
D3
D3
D3
D2
VREF2
TS2
D2
D2
D2
D1
VREF1
TS1
GAIN1
D1
D1
D0
(LSB)
VREF0
TS0
GAIN0
D0
D0
REG
0
1
2
3
4
TABLE 2. REGISTER DESCRIPTIONS
NONVOLATILE
DESCRIPTION
Y
Reference setting
Y
Temperature Sensor setting
Y
Gain and storage
Y
Storage
Y
Storage
Register 0: Bandgap Reference Gain (Nonvolatile)
Register 0 sets the output voltage of the bandgap reference
(VREF). Referring to Equation 1, the number “n” is the setting
from Register 0 as follows:
VREF
•
----n-----
255
,
for
n=0
to
255
This term of Equation 1 can vary from 0 to 1.20V.
Register 1: Temperature Slope Gain (Nonvolatile)
Register 1 sets the Temperature Slope (TS) of the
temperature sensor. Referring to Equation 1, the number “m”
is the setting from Register 1 as follows:
VTS
(---2-----•----m-----)---–---2---5----5--
255
VTS is the temperature dependent term and varies from
+136mV at -40°C to -126mV at +85°C. The other term varies
from -1 to +1 and scales the temperature term before adding
to the VREF portion.
Register 2: Device Gain and Storage (nonvolatile)
TABLE 3. REGISTER 2 OUTPUT GAIN (NONVOLATILE):
OUTPUT GAIN
GAIN1
0
GAIN0
0
OUTPUT GAIN, AV
x1
0
1
x2
1
0
x2
1
1
x4
Register 2 contains 2 bits (2 LSB’s) which control the output
gain of the device. Table 3 shows the state of these two bits
and the resulting output gain. Note that two states produce
the same gain (Gain 1:0 set to 01b and 10b) of x2.
The other 6 bits in the register can be used for general
purpose memory (nonvolatile) or left alone.
Registers 3 and 4: general purpose data
(nonvolatile)
These two registers are one byte each and can be used for
general purpose nonvolatile memory.
I2C Serial Interface
The ISL21400 supports a bidirectional bus oriented protocol.
The protocol defines any device that sends data onto the
bus as a transmitter and the receiving device as the receiver.
The device controlling the transfer is the master and the
device being controlled is the slave. The master always
initiates data transfers and provides the clock for both
transmit and receive operations. Therefore, the ISL21400
operates as a slave device in all applications.
All communication over the I2C interface is conducted by
sending the MSB of each byte of data first.
Protocol Conventions
Data states on the SDA line can change only during SCL
LOW periods. SDA state changes during SCL HIGH are
reserved for indicating START and STOP conditions (See
Figure 10). On power-up of the ISL21400 the SDA pin is in
the input mode.
All I2C interface operations must begin with a START
condition, which is a HIGH to LOW transition of SDA while
SCL is HIGH. The ISL21400 continuously monitors the SDA
and SCL lines for the START condition and does not
respond to any command until this condition is met (See
Figure 10). A START condition is ignored during the power-
up sequence and during non-volatile write cycles for the
device.
All I2C interface operations must be terminated by a STOP
condition, which is a LOW to HIGH transition of SDA while
SCL is HIGH (See Figure 10) A STOP condition at the end of
a read operation, or at the end of a write operation places
the device in its standby mode. A STOP condition at the end
of a write operation to a non-volatile byte initiates an internal
11
FN8091.0
December 14, 2006