HD-6409_08 Datasheet, PDF (11/14 Pages) Intersil Corporation – CMOS Manchester Encoder-Decoder

Timing Waveforms (Continued)
ECLK
SD/CDS
BZO
BOO
HD-6409
t_CE1
t_CE2
t_CE3
CTS
BZO
BOO
ECLK
FIGURE 11. ENCODER TIMING
t_CE4
t_CE5
FIGURE 12. ENCODER TIMING
CTS
ECLK
BZO
BOO
t_CE6
t_CE7
FIGURE 13. ENCODER TIMING
DCLK
UDI
SDO
MANCHESTER MANCHESTER MANCHESTER MANCHESTER
LOGIC-1
LOGIC-0
LOGIC-0
LOGIC-1
t_CD1
t_CD2
t_CD5
NVM
t_CD2
NRZ
LOGIC-1
NOTE: Manchester Data-In is not synchronous with Decoder Clock.
Decoder Clock is synchronous with decoded NRZ out of SDO.
FIGURE 14. DECODER TIMING
RST
DCLK, SDO,
NVM
50%
t_CD3
50%
FIGURE 15. DECODER TIMING
RST 50%
DCLK
t_CD4
FIGURE 16. DECODER TIMING
11
FN2951.3
October 15, 2008