KAD5514P_0909 Datasheet, PDF (10/34 Pages) Intersil Corporation – 14-Bit, 250/210/170/125MSPS ADC

KAD5514P
Pin Descriptions - 72QFN
PIN NUMBER
LVDS [LVCMOS] NAME
LVDS [LVCMOS] FUNCTION
SDR MODE
46
RLVDS
LVDS Bias Resistor
47
CLKOUTN
LVDS Clock Output Complement
[NC]
[NC in LVCMOS]
48
CLKOUTP
LVDS Clock Output True
[CLKOUT]
[ LVCMOS CLKOUT]
49
D8N
LVDS Bit 8 Output Complement
[NC]
[NC in LVCMOS]
50
D8P
LVDS Bit 8 Output True
[D8]
[ LVCMOS Bit 8]
51
D9N
LVDS Bit 9 Output Complement
[NC]
[NC in LVCMOS]
52
D9P
LVDS Bit 9 Output True
[D9]
[ LVCMOS Bit 9]
53
D10N
LVDS Bit 10 Output Complement
[NC]
[NC in LVCMOS]
54
D10P
LVDS Bit 10 Output True
[D10]
[ LVCMOS Bit 10]
57
D11N
LVDS Bit 11 Output Complement
[NC]
[NC in LVCMOS]
58
D11P
LVDS Bit 11 Output True
[D11]
[ LVCMOS Bit 11]
59
D12N
LVDS Bit 12 Output Complement
[NC]
[NC in LVCMOS]
60
D12P
LVDS Bit 12 Output True
[D10]
[ LVCMOS Bit 10]
61
D13N
LVDS Bit 13 (MSB) Output Complement
[NC]
[NC in LVCMOS]
62
D13P
LVDS Bit 13 (MSB) Output True
[D13]
[ LVCMOS Bit 11]
63
ORN
LVDS Over Range Complement
[NC]
[NC in LVCMOS]
64
ORP
LVDS Over Range True
[OR]
[ LVCMOS Over Range]
66
SDO
SPI Serial Data Output (4.7kΩ pull-up to
OVDD is required)
67
CSB
SPI Chip Select (active low)
68
SCLK
SPI Clock
69
SDIO
SPI Serial Data Input/Output
70
OUTFMT
Tri-Level Output Data Format (Two’s Comp.,
Gray Code, Offset Binary)
Exposed Paddle
AVSS
Analog Ground
NOTE: LVCMOS Output Mode Functionality is shown in brackets (NC = No Connection)
DDR MODE COMMENTS
DDR Logical Bits 9,8 (LVDS)
DDR Logical Bits 9,8 (LVDS or CMOS)
NC in DDR
NC in DDR
DDR Logical Bits 11,10 (LVDS)
DDR Logical Bits 11,10 (LVDS or
CMOS)
NC in DDR
NC in DDR
DDR Logical Bits 13,12 (LVDS)
DDR Logical Bits 13,12 (LVDS or
CMOS)
NC in DDR
NC in DDR
10
FN6804.2
September 10, 2009