ISL6720A Datasheet, PDF (10/11 Pages) Intersil Corporation – 100V Triple Linear Bias Supply

ISL6720A
Over-Temperature Protection
The ISL6720A has a two-stage over-temperature shutdown
mechanism. VIO and VSW shutdown approximately +10°C
lower than VCONT. The hysteresis for both thresholds is
large so that the IC has sufficient time to operate at start-up
loading levels without prematurely re-triggering the over
temperature protection. At rated load on each output, a
+105°C junction temperature, and with VPWR at 80V, the
thermal mass combined with the over-temperature
thresholds allows approximately 10ms of start-up time.
VPWR
VPWR provides the source voltage for the IC and load until
VIO is back biased. The IC is disabled (all outputs off) when
UVLO is active.
If the application requires high currents or longer start-up
times than the thermal protection allows, the device
dissipation may be reduced by adding a resistor or resistors
in series between the input voltage and VPWR. The
dropping resistance must be selected such that VPWR
remains above the UVLO threshold of VPWR and at least
5.5V greater than VIO under maximum load and minimum
input voltage to maintain regulation.
.
VIN
1 _VPWR
2 _VCONT
3 _VCOMP
4 _GND
5 _VSWADJ
FIGURE 9. ADDING DROPPING RESISTORS TO VPWR
PWB Layout Requirements
Careful layout is essential for satisfactory operation of the
device. In particular, the compensation capacitors must be
connected to VCOMP and VSWCOMP with short trace
lengths.
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FN6487.1
August 23, 2007