ISL6219 Datasheet, PDF (10/17 Pages) Intersil Corporation – Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications

ISL6219
TABLE 1. VOLTAGE IDENTIFICATION CODES (Continued)
VID4
VID3
VID2
VID1
VID0 VDAC
1
0
0
1
0
1.400
1
0
0
0
1
1.425
1
0
0
0
0
1.450
0
1
1
1
1
1.475
0
1
1
1
0
1.500
0
1
1
0
1
1.525
0
1
1
0
0
1.550
0
1
0
1
1
1.575
0
1
0
1
0
1.600
0
1
0
0
1
1.625
0
1
0
0
0
1.650
0
0
1
1
1
1.675
0
0
1
1
0
1.700
0
0
1
0
1
1.725
0
0
1
0
0
1.750
0
0
0
1
1
1.775
0
0
0
1
0
1.800
0
0
0
0
1
1.825
0
0
0
0
0
1.850
OVERVOLTAGE PROTECTION
If the ISL6219 detects output voltages above 115% of VID,
the controller will immediately commands all PWM outputs
low. This directs the Intersil drivers to turn on the lower
MOSFETs and protect the load by preventing any further
increase in output voltage. Once the output voltage falls to
the level set by the VID code, the PWM outputs enter high-
impedance mode. The Intersil drivers respond by turning off
both upper and lower MOSFETs. If the overvoltage condition
reoccurs, the ISL6219 will again command the lower
MOSFETs to turn on. The ISL6219 will continue to protect
the load in this fashion as long as the overvoltage repeats.
After detecting an overvoltage condition, the ISL6219
terminated normal PWM operation until it is reset by power
cycle in which VCC is removed below the POR falling
threshold and restored above the POR rising threshold as
described in Enable and Disable and Electrical
Specifications.
Under-Voltage
The VSEN pin also detects when the CORE voltage falls
more than 18% below the VID programmed level. This
causes PGOOD to go low, but has no other effect on
operation and is not latched.
LOAD-LINE REGULATION
In applications with high transient current slew rates, the
lowest-cost solution for maintaining regulation often requires
some kind of controlled output impedance. The average
current of all active channels driven into FB pin. Average full
channel current is defined as 50 µA. This forces I_AVG into the
summing node of the error amplifier and produces a voltage
drop across the feedback resistor, R_FB, proportional to the
output current. In Figure 7, the steady-state value of
V_DROOP is simply
V_DROOP = I_AVG R_FB
(EQ. 3)
As I_AVG increased (more current demand at output), the voltage
at inverting node of error amplifier will be higher. This makes the
error amplifier adjusting the output voltage lower. Therefore, the
output voltage decreases as output current increases.
In the case that each channel uses the same value for R_ISEN to
sense channel current, and this is almost always true, a more
complete expression for V_DROOP can be determined from the
expression for I_AVG as it is derived from Figures 4 and 5.
I_AVG
=
-^I-^O-----^U----^T--
N
r_{---D----S----(--O----N-----)}
R_ISEN
V_DROOP
=
-^I-^O-----^U----^T--
N
r_{---D----S----(--O----N-----)}
R_ISEN
R_FB
(EQ. 4)
ENABLE AND DISABLE
The internal power-on reset circuit (POR) prevents the
ISL6219 from starting before the bias voltage at VCC
reaches the POR-rising threshold as defined in Electrical
Specifications.The POR level is high enough to guarantee
that all parts of the ISL6219 can perform their functions
properly. When VCC is below the POR-rising threshold, the
PWM outputs are held in a high-impedance state to assure
the drivers remain off.
VCC
1.23V
+
-
EXTERNAL CIRCUIT
-
+ _FSET/EN
E
+5V
ENABLE
B
C
DISABLE
FIGURE 8. OPTIONAL ENABLE (EN) FUNCTION
ISL6219 has an optional enable feature. A PNP transistor
connects to pin 7 of ISL6219, as shown in Figure 8, can enable
or disable the IC. Connect the base of the PNP to a voltage
source which is greater than 1.23V plus the diode drop of PNP,
this will enable the IC. If connect it to ground, IC will disable.
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