ISL59481 Datasheet, PDF (10/12 Pages) Intersil Corporation – Dual, 500MHz Triple, Multiplexing Amplifiers

ISL59481
The QFN Package Requires Additional PCB Layout
Rules for the Thermal Pad
The thermal pad is electrically connected to V- supply
through the high resistance IC substrate. Its primary function
is to provide heat sinking for the IC. However, because of the
connection to the V1- and V2- supply pins through the
substrate, the thermal pad must be tied to the V- supply to
prevent unwanted current flow to the thermal pad. Do not tie
this pin to GND as this could result in large back biased
currents flowing between GND and the V- pins. Maximum
AC performance is achieved if the thermal pad is attached to
a dedicated decoupled layer in a multi-layered PC board. In
cases where a dedicated layer is not possible, AC
performance may be reduced at upper frequencies.
The thermal pad requirements are proportional to power
dissipation and ambient temperature. A dedicated layer
eliminates the need for individual thermal pad area. When a
dedicated layer is not possible, an isolated thermal pad on
another layer should be used. Pad area requirements should
be evaluated on a case by case basis.
MUX Application Circuits
Each of the two 4:1 triple MUX amplifiers have their own
binary-coded, TTL compatible channel select logic inputs
(S0-1, 2, and S1-1, 2). All three amplifiers are switched
simultaneously from their respective inputs with S0-1 S1-1
controlling MUX-amp1, and S0-2, S1-2 controlling MUX-
amp2. The HIZ control inputs (HIZ1, HIZ2) and device enable
control inputs (EN1 and EN2) control MUX-amp1 and MUX-
amp2 in a similar fashion. The individual control for each 4:1
triple MUX enables external connections to configure the
device for different MUX applications.
8:1 RGB Video MUX
For a triple input RGB 8:1 MUX (Figure 17), the RGB
amplifier outputs of MUX-amp1 are parallel-connected to the
RGB amplifier outputs of MUX-amp2 to produce the single
RGB video output. Input channels CH0 to CH3 are assigned
to MUX-amp1, and channels CH4 through CH7 are assigned
to MUX-amp2. Channels CH0 through CH3 are selected by
setting HIZ1 low, HIZ2 high (enables MUX-amp1 and three-
states MUX-amp2), and the appropriate channel select logic
to S0-1, S1-1. Reversing the logic inputs of HIZ1, HIZ2
switches from MUX-amp1 to MUX-amp2 enables the
selection of channels CH4 through CH7. The channel select
inputs are parallel connected (S0-1 to S0-2) and (S1-1 to
S1-2) to form two logic controls S0, S1. A single S2 control is
split into complimentary logic inputs for HIZ1 and HIZ2 to
produce a chip select function for the MSB. The logic control
truth table is shown in Figure 17.
CH0A - CH7A
CHANNELS B & C
NOT SHOWN
CHANNEL SELECT
LOGIC INPUTS
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
S0
S1
S2
ISL59481
1/3 MUX-AMP1
IN0A1
IN1A1
IN2A1
+1 ^OUTA1
IN3A1
S0-1
S1-1
HIZ1
IN0A2
IN1A2
IN2A2
IN3A2
CONTROL
LOGIC
1/3 MUX-AMP2
OUTA2
+1
S0-2
S1-2
HIZ2
CONTROL
LOGIC
OUTA
CHANNEL SELECT TRUTH TABLE
8:1 VIDEO MUX
S2 S1 S0 OUTA, B, C
0
0
0
CH0A, B, C
0
0
1
CH1A, B, C
0
1
0
CH2A, B, C
0
1
1
CH3A, B, C
1
0
0
CH4A, B, C
1
0
1
CH5A,B,C
1
1
0
CH6A, B, C
1
1
1
CH7A, B, C
FIGURE 17. APPLICATION CIRCUIT FOR 8:1 RGB VIDEO MUX
10
FN6208.3
December 22, 2006