ISL54224 Datasheet, PDF (10/18 Pages) Intersil Corporation – High-Speed USB 2.0 (480Mbps) Multiplexer with Overvoltage Protection (OVP) and Overvoltage Indicator Output

ISL54224
The HSx switches can also pass USB full-speed signals
(12Mbps) with minimal distortion and meet all the USB
requirements for USB 2.0 full-speed signaling. See
Figure 21 in the “Typical Performance Curves” on
page 14 for USB Full-speed Eye Pattern taken with
switch in the signal path.
The HS1 channel switches are active (turned ON)
whenever the SEL voltage is logic “0”(Low) and the
OE/ALM voltage is logic “1”(High).
The HS2 channel switches are active (turned ON)
whenever the SEL voltage is logic “1” (High) and the
OE/ALM voltage is logic “1” (High).
Overvoltage Protection (OVP)
The maximum normal operating signal range for the HSx
switches is from 0V to 3.6V. For normal operation, the
signal voltage should not be allowed to exceed this voltage
range or go below ground by more than -0.3V.
However, in the event that a positive voltage > 3.8V
(typ) to 5.25V, such as the USB 5V V_BUS voltage, gets
shorted to one or both of the COM+ and COM- pins or a
negative voltage < -0.5V (typ) to -5V gets shorted to one
or both of the COM pins, the ISL54224 has OVP circuitry
to detect the overvoltage condition and open the SPDT
switches to prevent damage to the USB down-stream
transceivers connected at the signal pins (HS1D-,
HS1D+, HS2D-, HS2D+).
The OVP and power-off protection circuitry allows the
COM pins (D-, D+) to be driven up to 5.25V while the
V_DD supply voltage is in the range of 0V to 5.25V. In this
condition the part draws < 100µA of I_COMx and I_DD
current and causes no stress to the IC. In addition, the
SPDT switches are OFF and the fault voltage is isolated
from the other side of the switch.
The OE/ALM pin gets internally pulled low whenever the
part senses an overvoltage condition. The pin must be
externally pulled “High” with a pull-up resistor and
monitored for a “Low” to determine when an overvoltage
condition has occurred.
External V_DD Series Resistor to Limit I_DD
Current during Negative OVP Condition
A 100Ω to 1kΩ resistor in series with the VDD pin (see
Figure 7) is required to limit the I_DD current draw from
the system power supply rail during a negative OVP fault
event.
With a negative -5V fault voltage at both com pins, the
graph in Figure 8 shows the IDD current draw for
different external resistor values for supply voltages of
2.7V, 3.6V, and 5.25V. Note: With a 500Ω resistor the
current draw is limited to around 5mA. When the
negative fault voltage is removed the I_DD current will
return to it’s normal operation current of 25µA to 45µA.
The series resistor also provides improved ESD and
latch-up immunity. During an overvoltage transient
event (such as occurs during system level IEC 61000
ESD testing), substrate currents can be generated in
the IC that can trigger parasitic SCR structures to turn
ON, creating a low impedance path from the VDD
power supply to ground. This will result in a significant
amount of current flow in the IC, which can potentially
create a latch-up state or permanently damage the IC.
The external VDD resistor limits the current during this
over-stress situation and has been found to prevent
latch-up or destructive damage for many overvoltage
transient events.
Under normal operation, the low microamp I_DD current
of the IC produces an insignificant voltage drop across
the series resistor resulting in no impact to switch
operation or performance.
-5V
FAULT
VOLTAGE
V_SUPPLY
C
PROTECTION
RESISTOR
100Ω to 1kΩ
I_DD
VDD
D+
OVP
D-
HSD1+
HSD2+
HSD1-
HSD2-
SEL _{LOGIC OE/ALM}
GND
V_SUPPLY
100kΩ
PULLED “LOW”
TO INDICATE OVP
FIGURE 7. V_DD SERIES RESISTOR TO LIMIT IDD
CURRENT DURING NEGATIVE OVP AND FOR
ENHANCED ESD AND LATCH-UP IMMUNITY
25
20
5.25V
15
V_COM+ = V_COM- = -5V
10
3.6V
5 2.7V
0
100 200 300 400 500 600 700 800 900 1k
RESISTOR (Ω)
FIGURE 8. NEGATIVE OVP IDD CURRENT vs RESISTOR
VALUE vs V_SUPPLY
ISL54224 Operation
The following will discuss using the ISL54224 shown in
the “Application Block Diagram” on page 9.
POWER
The power supply connected at the VDD pin provides the
DC bias voltage required by the ISL54224 part for proper
operation. The ISL54224 can be operated with a V_DD
voltage in the range of 2.7V to 5.25V.
10
FN6969.0
June 7, 2010