ISL28278 Datasheet, PDF (10/13 Pages) Intersil Corporation – Dual Micropower Single Supply Rail-to-Rail Input and Output (RRIO) Precision Op-Amp

ISL28278, ISL28478
Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
1.2
1 893mW
0.8
0.6
θ_{JA =1Q1S2°OCP/W16}
0.4
0.2
0
0
25
50
75 85 100 125 150
AMBIENT TEMPERATURE (°C)
FIGURE 35. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.2
1
0.8
633mW
0.6
0.4
θ_{JA =Q15S8O°CP/1W6}
0.2
0
0
25
50
75 85 100 125 150
AMBIENT TEMPERATURE (°C)
FIGURE 36. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Pin Descriptions
ISL28278
ISL28478
(16 LD QSOP) (16 LD QSOP)
3
1
4
2
5
3
15
4
12
5
13
6
14
7
1, 2, 8, 9, 10, 16
8, 9
10
11
12
7
13
14
15
16
6
11
PIN NAME
OUT_A
IN-_A
IN+_A
V+
IN+_B
IN-_B
OUT_B
NC
OUT_C
IN-_C
IN+_C
V-
IN+_D
IN-_D
OUT_D
EN_A
EN_B
EQUIVALENT
CIRCUIT
DESCRIPTION
Circuit 3 Amplifier A output
Circuit 1 Amplifier A inverting input
Circuit 1 Amplifier A non-inverting input
Circuit 4 Positive power supply
Circuit 1 Amplifier B non-inverting input
Circuit 1 Amplifier B inverting input
Circuit 3 Amplifier B output
No internal connection
Circuit 3 Amplifier C output
Circuit 1 Amplifier C inverting input
Circuit 1 Amplifier B non-inverting input
Circuit 4 Negative power supply
Circuit 1 Amplifier D non-inverting input
Circuit 1 Amplifier D inverting input
Circuit 3 Amplifier D output
Circuit 2
Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state;
Logic “0” selects the enabled state.
Circuit 2
Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled
state; Logic “0” selects the enabled state.
IN-
CIRCUIT 1
V+
IN+
V-
V+
LOGIC
PIN
V-
CIRCUIT 2
V+
OUT
V-
CIRCUIT 3
V+
CAPACITIVELY
COUPLED
ESD CLAMP
V-
CIRCUIT 4
10
FN6145.1
September 28, 2006