ZL2008ALBFT1 Datasheet, PDF (1/42 Pages) Intersil Corporation – Digital DC/DC Controller with Drivers and Pin-Strap Current Sharing

NOT RECOMMENDED FOR NEW DESIGNS
RECOMMENDED REPLACEMENT PART
ZL6105
Digital DC/DC Controller with Drivers and Pin-Strap
Current Sharing
ZL2008
The ZL2008 is a digital power controller with integrated
MOSFET drivers. Current sharing allows multiple devices to be
connected in parallel to source loads with very high current
demands. Adaptive performance optimization algorithms
improve power conversion efficiency. Zilker Labs Digital-DC™
technology enables a blend of power conversion performance
and power management features.
The ZL2008 is designed to be a flexible building block for DC
power and can be easily adapted to designs ranging from a
single-phase power supply operating from a 3.3V input to a
multi-phase supply operating from a 12V input. The ZL2008
eliminates the need for complicated power supply managers
as well as numerous external discrete components.
Key operating features can be configured by pin-straps,
including compensation, current sharing and output voltage.
The ZL2008 uses the I²C/SMBus™ with PMBus™ protocol for
communication with a host controller and the Digital-DC bus
for communication between Zilker Labs devices.
Applications
• Servers/storage equipment
• Telecom/datacom equipment
• Power supply modules
Features
Power Conversion
• Efficient synchronous buck controller
• Adaptive light load efficiency optimization
• 3V to 14V input range
• 0.54V to 5.5V output range (with margin)
• POLA and DOSA voltage trim modes
• ±1% output voltage accuracy
• Internal 3A MOSFET drivers
• Fast load transient response
• Current sharing and phase interleaving
• Snapshot™ parameter capture
• RoHS compliant (6mmx6mm) QFN package
Power Management
• Digital soft-start/stop
• Precision delay and ramp-up
• Power good/enable
• Voltage tracking, sequencing and margining
• Voltage, current and temperature monitoring
• I²C/SMBus interface, PMBus compatible
• Output voltage and current protection
• Internal non-volatile memory (NVM)
Block Diagram
EN PG DLY FC ILIM CFG UVLO V25 VR VDD
V
SS
VTRK
MGN
SYNC
DDC
SCL
SDA
SALRT
POWER
MANAGEMENT
NON-
VOLATILE
MEMORY
I² C
PWM
CONTROLLER
MONITOR
ADC
LDO
DRIVER
CURRENT
SENSE
TEMP
SENSOR
BST
GH
SW
GL
VSEN+
VSEN-
ISENA
ISENB
SA
XTEMP
PGND SGND DGND
FIGURE 1. BLOCK DIAGRAM
Efficiency vs Load Current
100
V_OUT = 3.3V
95
V_OUT = 1.5V
90
85
80
75
70
65
60
V_IN = 12V
55 _{fSW = 400kHz}
Circuit of Figure 4
50
02 4 6 8
10 12 14 16 18 20
Load Current (A)
FIGURE 2. EFFICIENCY vs LOAD CURRENT
April 29, 2011
1
FN6859.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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