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ZL2006_14 Datasheet, PDF (1/45 Pages) Intersil Corporation – Adaptive Digital DC-DC Controller with Drivers and Current Sharing | |||
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ZL2006
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Data Sheet
December 15, 2010
FN6850.1
Adaptive Digital DC-DC Controller with Drivers and Current Sharing
Description
The ZL2006 is a digital DC-DC controller with
integrated MOSFET drivers. Current sharing allows
multiple devices to be connected in parallel to source
loads with very high current demands. Adaptive
performance optimization algorithms improve power
conversion efficiency across the entire load range.
Zilker Labs Digital-DC⢠technology enables a blend
of power conversion performance and power
management features.
The ZL2006 is designed to be a flexible building block
for DC power and can be easily adapted to designs
ranging from a single-phase power supply operating
from a 3.3 V input to a multi-phase supply operating
from a 12 V input. The ZL2006 eliminates the need for
complicated power supply managers as well as
numerous external discrete components.
All operating features can be configured by simple pin-
strap/resistor selection or through the SMBus⢠serial
interface. The ZL2006 uses the PMBus⢠protocol for
communication with a host controller and the Digital-
DC bus for communication between other Zilker Labs
devices.
Features
Power Conversion
 Efficient synchronous buck controller
 Adaptive light load efficiency optimization
 3 V to 14 V input range
 0.54 V to 5.5 V output range (with margin)
 ±1% output voltage accuracy
 Internal 3 A MOSFET drivers
 Fast load transient response
 Current sharing and phase interleaving
 Snapshot⢠parameter capture
 RoHS compliant (6 x 6 mm) QFN package
Power Management
 Digital soft start / stop
 Precision delay and ramp-up
 Power good / enable
 Voltage tracking, sequencing, and margining
 Voltage / current / temperature monitoring
 I2C/SMBus interface, PMBus compatible
 Output voltage and current protection
 Internal non-volatile memory (NVM)
Applications
 Servers / storage equipment
 Telecom / datacom equipment
 Power supplies (memory, DSP, ASIC, FPGA)
Figure 1. Block Diagram
Figure 2. Efficiency vs. Load Current
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