X98024_06 Datasheet, PDF (1/29 Pages) Intersil Corporation – 240MHz Triple Video Digitizer with Digital PLL

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240MHz Triple Video Digitizer with
Digital PLL
The X98024 3-channel, 8-bit Analog Front End (AFE)
contains all the components necessary to digitize analog
RGB or YUV graphics signals from personal computers,
workstations and video set-top boxes. The fully differential
analog design provides high PSRR and dynamic
performance to meet the stringent requirements of the
graphics display industry. The AFE’s 240MSPS conversion
rate supports resolutions up to WUXGA at 75Hz refresh rate,
while the front end's high input bandwidth ensures sharp
images at the highest resolutions.
To minimize noise, the X98024's analog section features 2
sets of pseudo-differential RGB inputs with programmable
input bandwidth, as well as internal DC restore clamping
(including mid-scale clamping for YUV signals). This is
followed by the programmable gain/offset stage and the
three 240MSPS Analog-to-Digital Converters (ADCs).
Automatic Black Level Compensation (ABLC™) eliminates
part-to-part offset variation, ensuring perfect black level
performance in every application.
The X98024's digital PLL generates a pixel clock from the
analog source's HSYNC or SOG (Sync-On-Green) signals.
Pixel clock output frequencies range from 10MHz to 240MHz
with sampling clock jitter of 250ps peak to peak.
Simplified Block Diagram
March 8, 2006
X98024
FN8220.3
Features
• 240MSPS maximum conversion rate
• Low PLL clock jitter (250ps p-p @ 240MSPS)
• 64 interpixel sampling positions
• 0.35V_p-p to 1.4V_p-p video input range
• Programmable bandwidth (100MHz to 780MHz)
• 2 channel input multiplexer
• RGB and YUV 4:2:2 output formats
• 5 embedded voltage regulators allow operation from
single 3.3V supply and enhance performance, isolation
• Completely independent 8 bit gain/10 bit offset control
• CSYNC and SOG support
• Trilevel sync detection
• 1.15W typical P_D @ 240MSPS
• Pb-free plus anneal available (RoHS compliant)
Applications
• LCD Monitors and Projectors
• Digital TVs
• Plasma Display Panels
• RGB Graphics Processing
• Scan Converters
RGB/YPbPr_IN 1 ³
RGB/YPbPr_IN 2 ³
Voltage
Clamp
PGA
Offset
DAC
ABLC™
+
8 bit ADC
SOG_IN1/2
HSYNC_IN1/2
VSYNC_IN1/2
Sync
Processing
Digital PLL
AFE Configuration and Control
8 or 16
RGB/YUV_OUT
x3
HSYNC_OUT
VSYNC_OUT
HS_OUT
PIXELCLK_OUT
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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