HUF76639P3 Datasheet, PDF (1/9 Pages) Fairchild Semiconductor – 50A, 100V, 0.027 Ohm, N-Channel, Logic Level UltraFET Power MOSFET

Data Sheet
HUF76639P3, HUF76639S3S
November 1999 File Number 4694.3
50A, 100V, 0.027 Ohm, N-Channel, Logic
Level UltraFET Power MOSFET
Packaging
JEDEC TO-220AB
JEDEC TO-263AB
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
DRAIN
(FLANGE)
HUF76639P3
GATE
SOURCE
HUF76639S3S
Symbol
D
G
S
Features
• Ultra Low On-Resistance
- r_DS(ON) = 0.026Ω, V_GS = 10V
- r_DS(ON) = 0.027Ω, V_GS = 5V
• Simulation Models
- Temperature Compensated PSPICE^® and SABER^©
Electrical Models
- Spice and SABER^© Thermal Impedance Models
- www.Intersil.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Switching Time vs R_GS Curves
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF76639P3
TO-220AB
76639P
HUF76639S3S
TO-263AB
76639S
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF76639S3ST.
Absolute Maximum Ratings T_C = 25^oC, Unless Otherwise Specified
HUF76639P3,
HUF76639S3S
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_DSS
Drain to Gate Voltage (R_GS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_GS
Drain Current
Continuous
Continuous
Continuous
Continuous
(T_C=
(T_C=
(T_C=
(T_C=
22115500^oo_00CCooCC,, VV,, _VVGGGGSSSS====51V054VV.)5))V.()..F..(igF..ui..gr..ue..r2e.. _)..2...)
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I_D
I_D
I_D
I_D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I_DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS
100
V
100
V
±16
V
50
A
51
A
35
A
34
A
Figure 4
Figures 6, 17, 18
Power Dissipation . . .
Derate Above 25^oC
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P_D
...
180
W
1.2
W/^oC
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T_J, T_STG
-55 to 175
o_C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T_L
Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T_pkg
300
o_C
260
o_C
NOTES:
1. T_J = 25^oC to 150^oC.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
4-1
CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures.
UltraFET™ is a trademark of Intersil Corporation. PSPICE^® is a registered trademark of MicroSim Corporation.
SABER^© is a Copyright of Analogy Inc. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999.