HUF76409D3 Datasheet, PDF (1/9 Pages) Fairchild Semiconductor – 17A, 60V, 0.071 Ohm, N-Channel, Logic Level UltraFET Power MOSFET

Data Sheet
HUF76409D3, HUF76409D3S
October 1999 File Number 4665.1
17A, 60V, 0.071 Ohm, N-Channel, Logic
Level UltraFET Power MOSFET
Packaging
JEDEC TO-251AA
JEDEC TO-252AA
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
HUF76409D3
DRAIN
(FLANGE)
GATE
SOURCE
HUF76409D3S
Symbol
D
G
S
Features
• Ultra Low On-Resistance
- r_DS(ON) = 0.063Ω, V_GS = 10V
- r_DS(ON) = 0.071Ω, V_GS = 5V
• Simulation Models
- Temperature Compensated PSPICE^® and SABER^©
Electrical Models
- Spice and SABER^© Thermal Impedance Models
- www.Intersil.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Switching Time vs R_GS Curves
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF76409D3
TO-251AA
76409D
HUF76409D3S
TO-252AA
76409D
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-252AA variant in tape and reel, e.g., HUF76409D3ST.
Absolute Maximum Ratings T_C = 25^oC, Unless Otherwise Specified
HUF76409D3, HUF76409D3SS UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_DSS
Drain to Gate Voltage (R_GS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_GS
Drain Current
Continuous
Continuous
(T_C=
(T_C=
25^oC,
25^oC,
V_GS
V_GS
=
=
5V) . . . . . . .
10V) (Figure
..
2)
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I_D
I_D
Continuous (T_C= 135^oC, V_GS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I_D
Continuous (T_C= 135^oC, V_GS = 4.5V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I_D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I_DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS
60
V
60
V
±16
V
17
A
18
A
8
A
8
A
Figure 4
Figures 6, 17, 18
Power Dissipation . . .
Derate Above 25^oC
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P_D
...
49
0.327
W
W/^oC
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T_J, T_STG
-55 to 175
o_C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T_L
Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T_pkg
300
o_C
260
o_C
NOTE:
1. T_J = 25^oC to 150^oC.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1
CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures.
UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
SABER^© is a Copyright of Analogy Inc. 1-888-INTERSIL or 407-727-9207 | Copyright © Intersil Corporation 1999.