HUF76407DK8 Datasheet, PDF (1/12 Pages) Fairchild Semiconductor – 3.5A, 60V, 0.105 Ohm, Dual N-Channel, Logic Level UltraFET Power MOSFET

Data Sheet
HUF76407DK8
October 1999 File Number 4712.4
3.5A, 60V, 0.105 Ohm, Dual N-Channel,
Logic Level UltraFET Power MOSFET
Packaging
JEDEC MS-012AA
BRANDING DASH
5
1
2
3
4
Symbol
SOURCE1 (1)
GATE1 (2)
SOURCE2 (3)
GATE2 (4)
DRAIN 1 (8)
DRAIN 1 (7)
DRAIN 2 (6)
DRAIN 2 (5)
Features
• Ultra Low On-Resistance
- r_DS(ON) = 0.090Ω, V_GS = 10V
- r_DS(ON) = 0.105Ω, V_GS = 5V
• Simulation Models
- Temperature Compensated PSPICE^® and SABER^©
Electrical Models
- Spice and SABER Thermal Impedance Models
- www.semi.Intersil.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Transient Thermal Impedance Curve vs Board Mounting
Area
• Switching Time vs R_GS Curves
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF76407DK8
MS-012AA
76407DK8
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF76407DK8T.
Absolute Maximum Ratings T_A = 25^oC, Unless Otherwise Specified
HUF76407DK8
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_DSS
Drain to Gate Voltage (R_GS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_GS
Drain Current
Continuous
Continuous
Continuous
(T_A=
(T_A=
(T_A=
221550^oo_0CCoC,, VV, _VGGGSSS===51V05VV) _{))(N((FNoitogetue2re)3.)2..)..(..N..o..te.. ..2..)..}
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I_D
I_D
I_D
Continuous (T_A= 100^oC, V_GS = 4.5V) (Figure 2) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . I_D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I_DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS
60
V
60
V
±16
V
3.5
A
3.8
A
1.0
A
1.0
A
Figure 4
Figures 6, 17, 18
Power Dissipation (Note 2)
Derate Above 25^oC . . . .
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P_D
...
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T_J, T_STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T_L
Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T_pkg
NOTES:
1. T_J = 25^oC to 125^oC.
2. 50^oC/W measured using FR-4 board with 0.76 in² (490.3 mm²) copper pad at 1 second.
3. 228^oC/W measured using FR-4 board with 0.006 in² (3.87 mm²) copper pad at 1000 seconds.
2.5
20
-55 to 150
300
260
W
mW/^oC
o_C
o_C
o_C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
SABER is a Copyright of Analogy, Inc. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999