HSP50307 Datasheet, PDF (1/8 Pages) Intersil Corporation – Burst QPSK Modulator

HSP50307
December 1996
Burst QPSK Modulator
Features
• 256 KBPS Data Rate and 128 KBPS Baud Rate
• Burst QPSK Modulation
• Programmable Carrier Frequency from 8MHz to
15MHz With a Frequency Step Size of 32kHz
• α = 0.5 Root Raised Cosine (RRC) Filtering For Spec-
trum Shaping
• On-Board Synthesizer
• Programmable Output Level From 22 to 62dBmV in
1dB Steps
• Programmable Charge Pump Current Control
• 62dBmV Differential Output Driver for 75Ω Cable
Applications
• Burst QPSK Modulator
• HSP50307EVAL1 Evaluation Board Is Available
Ordering Information
PART NUMBER
HSP50307SC
TEMP.
RANGE (^oC)
PACKAGE
0 to 70
28 Ld SOIC
PKG.
NO.
M28.3
Description
The HSP50307 is a mixed signal burst QPSK Modulator for
upstream CATV Applications. The HSP50307 demultiplexes
and modulates a serial data stream onto an RF Carrier cen-
tered between 8 and 15MHz. The signal spectrum is shaped
with α = 0.5 root raised cosine (RRC) digital filters. On-chip fil-
tering limits spurs and harmonics to levels below -35dBc dur-
ing transmissions. The output power level is adjustable over a
40dB range in 1dB steps. The maximum differential output
level is +62dBmV into 75Ω. A transmitter inhibit function dis-
ables the RF output outside the burst interval. The differential
output amplifier int7-erfaces to the cable via a transformer.
The Block Diagram of the HSP50307 QPSK Modulator is
shown below. The HSP50307 consists of a digital control
interface, an I/Q generator, a synthesizer, and a quadrature
modulator.
The data clock is derived from the master clock. The
HSP50307 demultiplexes the input data bits into in-phase (I)
and quadrature (Q) data streams. The first bit and subsequent
alternating bits of the burst are in-phase data. The two data
streams are filtered, converted from digital to analog, and low
pass filtered to produce the baseband I and Q analog signals.
The baseband signals are up-converted to RF in the Quadra-
ture Modulation Section. The synthesizer provides the local
oscillator (LO) for the quadrature modulator. The frequency is
programmable via the control interface with a resolution of
32kHz. The output of the quadrature modulator is low pass fil-
tered to remove harmonic distortion.
Block Diagram
RCLK VCO_IN VCO_SET PD_OUT
RESET
CCLK
C_EN
CDATA
TX_EN
TX_DATA
TXCLK
MCLK
CONTROL
INTERFACE
†
SYNTHESIZER
I/Q GENERATOR
I
9
8RRC
D/A
†
LPF
Q
9
8RRC
D/A
LPF
/100
QUAD
GEN
QUADRATURE †
MODULATOR
+ LPF PGA
TX_EN
MOD_OUT-
MOD_OUT+
† Indicates analog circuitry.
DAC_REF
MCLK MUST ALWAYS BE PRESENT FOR PROPER OPERATION
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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