HSP50214B Datasheet, PDF(1/60 Page) Intersil Corporation

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HSP50214B Datasheet, PDF (1/60 Pages) Intersil Corporation – Programmable Downconverter

Data Sheet

HSP50214B

May 2000 File Number 4450.3

Programmable Downconverter

[ /Title

(HSP5

0214B)

/Sub-

ject

(Pro-

gram-

mable

Down-

con-

verter)

/Autho

r ()

/Key-

words

(Inter-

sil

Corpo-

ration,

Down-

con-

verter,

Down

Con-

verter,

Pro-

gram-

mable

Down-

con-

verter,

DSP,

AMPS,

TDMA

, North

Ameri-

can

TDMA

, GSM,

The HSP50214B Programmable Downconverter converts

digitized IF data into ï¬ltered baseband data which can be

processed by a standard DSP microprocessor. The

Programmable Downconverter (PDC) performs down

conversion, decimation, narrowband low pass ï¬ltering, gain

scaling, resampling, and Cartesian to Polar coordinate

conversion.

The 14-bit sampled IF input is down converted to baseband

by digital mixers and a quadrature NCO, as shown in the

Block Diagram. A decimating (4 to 32) ï¬fth order Cascaded

Integrator-Comb (CIC) ï¬lter can be applied to the data

before it is processed by up to 5 decimate-by-2 halfband

ï¬lters. The halfband ï¬lters are followed by a 255-tap

programmable FIR ï¬lter. The output data from the

programmable FIR ï¬lter is scaled by a digital AGC before

being re-sampled in a polyphase FIR ï¬lter. The output

section can provide seven types of data: Cartesian (I, Q),

polar (R, Î¸), ï¬ltered frequency (dÎ¸/dt), Timing Error (TE), and

AGC level in either parallel or serial format.

Ordering Information

PART

NUMBER

TEMP.

RANGE (oC)

PACKAGE

HSP50214BVC

0 to 70 120 Ld MQFP

HSP50214BVI

-40 to 85 120 Ld MQFP

PKG. NO.

Q120.28x28

Block Diagram

C(7:0)

IN(13:0)

GAIN

ADJ

(2:0)

COF

SOF

CLKIN

PROCCLK

REFCLK

MICROPROCESSOR

READ/WRITE

CONTROL

LEVEL DETECT

5TH

ORDER

CIC

FILTER

CARRIER

NCO

5TH

ORDER

CIC

FILTER

RESAMPLING

NCO

Features

â¢ Up to 65 MSPS Front-End Processing Rates (CLKIN) and

55MHz Back-End Processing Rates (PROCCLK)

Clocks May Be Asynchronous

â¢ Processing Capable of >100dB SFDR

â¢ Up to 255-Tap Programmable FIR

â¢ Overall Decimation Factor Ranging from 4 to 16384

â¢ Output Samples Rates to â12.94 MSPS with Output

Bandwidths to â 982kHz Lowpass

â¢ 32-Bit Programmable NCO for Channel Selection and

Carrier Tracking

â¢ Digital Resampling Filter for Symbol Tracking Loops and

Incommensurate Sample-to-Output Clock Ratios

â¢ Digital AGC with Programmable Limits and Slew Rate to

Optimize Output Signal Resolution; Fixed or Auto Gain

Adjust

â¢ Serial, Parallel, and FIFO 16-Bit Output Modes

â¢ Cartesian to Polar Converter and Frequency Discriminator

for AFC Loops and Demodulation of AM, FM, FSK, and

DPSK

â¢ Input Level Detector for External I.F. AGC Support

Applications

â¢ Single Channel Digital Software Radio Receivers

â¢ Base Station Rxâs: AMPS, NA TDMA, GSM, and CDMA

â¢ Compatible with HSP50210 Digital Costas Loop for PSK

Reception

â¢ Evaluation Platform Available

AGC LOOP FILTER

AGC

POLYPHASE

FIR AND

HALFBAND

FILTERS

POLYPHASE

FIR AND

HALFBAND

FILTERS

I OUT

CARTESIAN

POLAR

COORDINATE

CONVERTER

MAG.

PHASE

Q OUT

FREQ

DISCRIMINATOR

TIMING ERROR

SEROUTA

SEROUTB

AOUT(15:0)

BOUT(15:0)

3-1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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