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HSP45102 Datasheet, PDF (1/7 Pages) Intersil Corporation – 12-Bit Numerically Controlled Oscillator
Data Sheet
HSP45102
January 1999 File Number 2810.6
12-Bit Numerically Controlled Oscillator
The Intersil HSP45102 is Numerically Controlled Oscillator
(NCO12) with 32-bit frequency resolution and 12-bit output.
With over 69dB of spurious free dynamic range and worst
case frequency resolution of 0.009Hz, the NCO12 provides
significant accuracy for frequency synthesis solutions at a
competitive price.
The frequency to be generated is selected from two frequency
control words. A single control pin selects which word is used
to determine the output frequency. Switching from one
frequency to another occurs in one clock cycle, with a 6 clock
pipeline delay from the time that the new control word is
loaded until t3-he new frequency appears on the output.
Two pins, P0-1, are provided for phase modulation. They are
encoded and added to the top two bits of the phase
accumulator to offset the phase in 90o increments.
The 13-bit output of the Phase Offset Adder is mapped to
the sine wave amplitude via the Sine ROM. The output data
format is offset binary to simplify interfacing to D/A
converters. Spurious frequency components in the output
sinusoid are less than -69dBc.
The NCO12 has applications as a Direct Digital Synthesizer
and modulator in low cost digital radios, satellite terminals,
and function generators.
Features
• 33MHz, 40MHz Versions
• 32-Bit Frequency Control
• BFSK, QPSK Modulation
• Serial Frequency Load
• 12-Bit Sine Output
• Offset Binary Output Format
• 0.009Hz Tuning Resolution at 40MHz
• Spurious Frequency Components <-69dBc
• Fully Static CMOS
• Low Cost
Applications
• Direct Digital Synthesis
• Modulation
• PSK Communications
• Related Products
- HI5731 12-Bit, 100MHz D/A Converter
Ordering Information
PART NUMBER
HSP45102PC-33
HSP45102PC-40
HSP45102SC-33
HSP45102SC-40
HSP45102SI-33
TEMP.
RANGE (oC)
PACKAGE
0 to 70 28 Ld PDIP
0 to 70 28 Ld PDIP
0 to 70 28 Ld SOIC
0 to 70 28 Ld SOIC
-40 to 85 28 Ld SOIC
PKG.
NO.
E28.6
E28.6
M28.3
M28.3
M28.3
Block Diagram
CLK
PO-1
MSB/ LSB
SFTEN
SD
SCLK
FREQUENCY
CONTROL
SECTION
32
PHASE
32 ACCUMULATOR 13
PHASE
OFFSET
ADDER
13 SINE 12
ROM
OUT0-11
LOAD
TXFR
ENPHAC
SEL_L / M
3-195
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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