HSP43881 Datasheet, PDF (1/21 Pages) Intersil Corporation – Digital Filter

Data Sheet
HSP43881
May 1999 File Number 2758.4
Digital Filter
The HSP43881 is a video speed Digital Filter (DF) designed
to efficiently implement vector operations such as FIR digital
filters. It is comprised of eight filter cells cascaded internally
and a shift and add output stage, all in a single integrated
circuit. Each filter cell contains a 8 x 8-bit multiplier, three
decimation registers and a 26-bit accumulator. The output
stage contains an additional 26-bit accumulator which can
add the contents of any filter cell accumulator to the output
stage accumulator shifted right by 8 bits. The HSP43881 has
a maximum sample rate of 30MHz. The effective multiply
accumulate (mac) rate is 240MHz.
The HSP43881 DF can be configured to process expanded
coefficient and word sizes. Multiple DFs can be cascaded for
larger filter lengths without degrading the sample rate or a
single DF can process larger filter lengths at less than
30MHz with multiple passes. The architecture permits
processing filter lengths of over 1000 taps with the
guarantee of no overflows. In practice, most filter coefficients
are less than 1.0, making even larger filter lengths possible.
The DF provides for 8-bit unsigned or two’s complement
arithmetic, independently selectable for coefficients and
signal data.
Each DF filter cell contains three resampling or decimation
registers which permit output sample rate reduction at rates
of ¹/₂, ¹/₃ or ¹/₄ the input sample rate. These registers also
provide the capability to perform 2-D operations such as
matrix multiplication and N x N spatial
correlations/convolutions for image processing applications.
Features
• Eight Filter Cells
• 0MHz to 30MHz Sample Rate
• 8-Bit Coefficients and Signal Data
• 26-Bit Accumulator Per Stage
• Filter Lengths Over 1000 Taps
• Expandable Coefficient Size, Data Size and Filter Length
• Decimation by 2, 3 or 4
Applications
• 1-D and 2-D FIR Filters
• Radar/Sonar
• Adaptive Filters
• Echo Cancellation
• Complex Multiply-Add
• Sample Rate Converters
Ordering Information
PART
NUMBER
HSP43881JC-20
HSP43881JC-25
TEMP. RANGE
(^oC)
PACKAGE
0 to 70
84 Ld PLCC
0 to 70
84 Ld PLCC
PKG. NO.
N84.1.15
N84.1.15
HSP43881JC-30
HSP43881GC-20
HSP43881GC-25
0 to 70
0 to 70
0 to 70
84 Ld PLCC
85 Ld PGA
85 Ld PGA
N84.1.15
G85.A
G85.A
HSP43881GC-30
0 to 70
85 Ld PGA G85.A
Block Diagram
V_CC V_SS
DIN0 - DIN7 TCS
DIENB
CIENB 5
DCMO - 1
ERASE
8
TCCI
CIN0 - 7 ⁸
DF
FILTER ₈
CELL 0
RESET _{5 5}
26
CLK
ADR0 - 2
3
8
8
DF
FILTER ₈
CELL 1
26
8
DF
FILTER ₈
CELL 2
26
8
DF
FILTER ₈
CELL 3
26
MUX
RESET
CLK
SHADD
SENBL
SENBH
ADR0, ADR1, ADR2
2
2
26
OUTPUT
STAGE
26
SUM0 - 25
8
DF
FILTER ₈
CELL 4
26
8
DF
FILTER ₈
CELL 5
26
8
DF
FILTER ₈
CELL 6
26
8
DF
FILTER ₈
CELL 7
26
TCCO
COUT0 - 7
COENB
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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