HS-80C86RH_00 Datasheet, PDF (1/29 Pages) Intersil Corporation – Radiation Hardened 16-Bit CMOS Microprocessor

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Data Sheet
HS-80C86RH
August 2000 File Number 3035.2
Radiation Hardened 16-Bit CMOS
Microprocessor
The Intersil HS-80C86RH high performance radiation
hardened 16-bit CMOS CPU is manufactured using a
hardened field, self aligned silicon gate CMOS process. Two
modes of operation, MINimum for small systems and
MAXimum for larger applications such as multiprocessing,
allow user configuration to achieve the highest performance
level. Industry standard operation allows use of existing
NMOS 8086 hardware and software designs.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-95722. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.asp
Ordering Information
ORDERING NUMBER
INTERNAL
MKT. NUMBER
TEMP. RANGE
(^oC)
5962R9572201QQC HS1-80C86RH-8
-55 to 125
5962R9572201QXC HS9-80C86RH-8
-55 to 125
5962R9572201VQC HS1-80C86RH-Q
-55 to 125
5962R9572201VXC
HS9-80C86RH-Q
-55 to 125
HS1-80C86RH/Proto HS1-80C86RH/Proto
-55 to 125
HS9-80C86RH/Proto HS9-80C86RH/Proto
-55 to 125
Features
• Electrically Screened to SMD # 5962-95722
• QML Qualified per MIL-PRF-38535 Requirements
• Radiation Performance
- Latch Up Free EPl-CMOS
- Total Dose. . . . . . . . . . . . . . . . . . . . . 100 krad(Si) (Max)
- Transient Upset . . . . . . . . . . . . . . . . . . . . >10⁸ rad(Si)/s
• Low Power Operation
- ICCSB. . . . . . . . . . . . . . . . . . . . . . . . . . . . 500µA (Max)
- ICCOP . . . . . . . . . . . . . . . . . . . . . . . 12mA/MHz (Max)
• Pin Compatible with NMOS 8086 and Intersil 80C86
• Completely Static Design DC to 5MHz
• 1MB Direct Memory Addressing Capability
• 24 Operand Addressing Modes
• Bit, Byte, Word, and Block Move Operations
• 8-Bit and 16-Bit Signed/Unsigned Arithmetic
- Binary or Decimal
- Multiply and Divide
• Bus-Hold Circuitry Eliminates Pull-up Resistors for CMOS
Designs
• Hardened Field, Self-Aligned, Junction-Isolated CMOS
Process
• Single 5V Power Supply
• Military Temperature Range . . . . . . . . . . . -35^oC to 125^oC
• Minimum LET for
Single Event Upset . . . . . . . . . . . . . 6MEV/mg/cm² (Typ)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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