HS-6617RH Datasheet, PDF (1/14 Pages) Intersil Corporation – Radiation Hardened 2K x 8 CMOS PROM

HS-6617RH
August 1995
Radiation Hardened
2K x 8 CMOS PROM
Features
• Total Dose 1 x 10⁵ RAD (Si)
• Latch-Up Free >1 x 10¹² RAD (Si)/s
• Field Programmable
• Functionally Equivalent to HM-6617
• Pin Compatible with Intel 2716
• Low Standby Power 1.1mW Max
• Low Operating Power 137.5mW/MHz Max
• Fast Access Time 100ns Max
• TTL Compatible Inputs/Outputs
• Synchronous Operation
• On Chip Address Latches
• Three-State Outputs
• Nicrome Fuse Links
• Easy Microprocessor Interfacing
• Military Temperature Range -55^oC to +125^oC
Description
The Intersil HS-6617RH is a radiation hardened 16K CMOS PROM,
organized in a 2K word by 8-bit format. The chip is manufactured
using a radiation hardened CMOS process, and is designed to be
functionally equivalent to the HM-6617. Synchronous circuit design
techniques combine with CMOS processing to give this device high
speed performance with very low power dissipation.
On chip address latches are provided, allowing easy interfacing with
recent generation microprocessors that use multiplexed address/data
bus structure, such as the HS-80C85RH or HS-80C86RH. The output
enable control (G) simplifies microprocessor system interfacing by
allowing output data bus control, in addition to, the chip enable
control. Synchronous operation of the HS-6617RH is ideal for high
speed pipe-lined architecture systems and also in synchronous logic
replacement functions.
Applications for the HS-6617RH CMOS PROM include low power
microprocessor based instrumentation and communications systems,
remote data acquisition and processing systems, processor control
store, and synchronous logic replacement.
Pinouts
24 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T24
TOP VIEW
A7 1
A6 2
A5 3
A4 4
A3 5
A2 6
A1 7
A0 8
Q0 9
Q1 10
Q2 11
GND 12
24 VDD
23 A8
22 A9
21 P
20 G
19 A10
18 E
17 Q7
16 Q6
15 Q5
14 Q4
13 Q3
24 LEAD CERAMIC METAL SEAL FLATPACK
PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F24
TOP VIEW
A7
1
24
VDD
A6
2
23
A8
A5
3
22
A9
A4
4
21
P
A3
5
20
G
A2
6
19
A10
A1
7
18
E
A0
8
17
Q7
Q0
9
16
Q6
Q1
10
15
Q5
Q2
11
14
Q4
GND
12
13
Q3
Ordering Information
PART NUMBER
HS1-6617RH-Q
HS1-6617RH-8
HS1-6617RH/SAMPLE
HS1-6617RH/PROTO
HS9-6617RH-Q
HS9-6617RH-8
HS9-6617RH/Sample
HS9-6617RH/PROTO
TEMPERATURE RANGE
-55^oC to +125^oC
-55^oC to +125^oC
25^oC
-55^oC to +125^oC
-55^oC to +125^oC
-55^oC to +125^oC
25^oC
-55^oC to +125^oC
PACKAGE
24 Lead SBDIP
24 Lead SBDIP
24 Lead SBDIP
24 Lead SBDIP
24 Lead Flatpack
24 Lead Flatpack
24 Lead Flatpack
24 Lead Flatpack
PIN
DESCRIPTION
A
Address Input
Q
Data Output
E
Chip Enable
G
Output Enable
P
Program Enable (P Hardwired to
VDD, except during programming)
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
Spec Number 518742
File Number 3033.3